AGXD533AAXF0CC AMD (ADVANCED MICRO DEVICES), AGXD533AAXF0CC Datasheet - Page 446

no-image

AGXD533AAXF0CC

Manufacturer Part Number
AGXD533AAXF0CC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AGXD533AAXF0CC

Device Core
X86
Device Core Size
64b
Frequency (max)
400MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.58V
Operating Supply Voltage (min)
1.42V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
368
Package Type
BGD
Lead Free Status / Rohs Status
Not Compliant
6.12.2.12 Memory Region 3 Configuration (R3)
MSR Address
Type
Reset Value
446
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
63:44
43:32
31:12
11:9
Bit
7:6
8
5
4
3
2
1
0
Name
TOP
RSVD (RO)
BASE
RSVD (RO)
EN
RSVD (RO)
PF
WC
RSVD (RO)
WP
RSVD
CD
5000201Bh
R/W
00000000_00000000h
31505E
Description
Top of Region. 4 KB granularity, inclusive.
Reserved (Read Only). Reserved for future use.
Base of Region. 4 KB granularity, inclusive.
Reserved (Read Only). Reserved for future use.
Region Enable. Set to 1 to enable access to this region.
Reserved (Read Only). Reserved for future use.
Prefetchable. Reads to this region have no side-effects.
Write Combine. Writes to this region may be combined.
Reserved (Read Only). Reserved for future use.
Write Protect. When set to 1, only read accesses are allowed. Write accesses are
ignored (master abort).
Reserved. Reserved for internal AMD use. Always clear this bit to 0.
Cache Disable. When set to 1, accesses are marked as non-coherent. When cleared to
0, accesses are marked as coherent.
BASE
TOP
R3 Bit Descriptions
R3 Register Map
GeodeLink™ PCI Bridge Register Descriptions
RSVD
AMD Geode™ GX Processors Data Book
9
8
RSVD
7
RSVD
6
5
4
3
2
1
0

Related parts for AGXD533AAXF0CC