AGXD533AAXF0CC AMD (ADVANCED MICRO DEVICES), AGXD533AAXF0CC Datasheet - Page 281

• Manufacturer Part Number: AGXD533AAXF0CC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AGXD533AAXF0CC

• Device Core: X86
• Device Core Size: 64b
• Frequency (max): 400MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.58V
• Operating Supply Voltage (min): 1.42V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 368
• Package Type: BGD
• Lead Free Status / Rohs Status: Not Compliant

Display Controller Register Descriptions
6.6.5.2
DC Memory Offset 44h
Type
Reset Value
This register contains horizontal blank timing information.
Note: A minimum of four character clocks is required for the horizontal blanking portion of a line in order for the timing
6.6.5.3
DC Memory Offset 48h
Type
Reset Value
This register contains CRT horizontal sync timing information. Note, however, that this register should also be programmed
appropriately for flat panel only display since the horizontal sync transition determines when to advance the vertical
counter.
AMD Geode™ GX Processors Data Book
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:28
27:19
18:16
15:12
31:28
11:3
Bit
2:0
Bit
RSVD
RSVD
generator to function correctly.
DC CRT Horizontal Blanking Timing (DC_H_BLANK_TIMING)
DC CRT Horizontal Sync Timing (DC_H_SYNC_TIMING)
Name
RSVD
H_BLK_END
RX
RSVD
H_BLK_START
RX
Name
RSVD
R/W
xxxxxxxxh
R/W
xxxxxxxxh
H_SYNC_END
H_BLK_END
Description
Reserved. Write as 0.
Horizontal Blank End. This field represents the character clock count at which the
(internal) horizontal blanking signal becomes inactive minus 1. The field [27:16] may be
programmed with the pixel count minus 1, although bits [18:16] are ignored. The blank
end position is programmable on 8-pixel boundaries only.
Reserved. These bits are readable and writable but have no effect. See H_BLK_END
(bits [27:19]) description.
Reserved. Write as 0.
Horizontal Blank Start. This field represents the character clock count at which the hor-
izontal blanking signal becomes active minus 1. The field [11:0] may be programmed
with the pixel count minus 1, although bits [2:0] are ignored. The blank start position is
programmable on 8-pixel boundaries only.
Reserved. These bits are readable and writable but have no effect. See H_BLK_START
(bits [11:3]) description.
Description
Reserved. Write as 0.
DC_H_BLANK_TIMING Bit Descriptions
DC_H_SYNC_TIMING Bit Descriptions
DC_H_BLANK_TIMING Register Map
DC_H_SYNC_TIMING Register Map
RX
RX
RSVD
RSVD
9
9
H_BLK_START
H_SYNC_ST
8
8
31505E
7
7
6
6
5
5
4
4
3
3
2
2
RX
RX
1
1
281
0
0