AGXD533AAXF0CC AMD (ADVANCED MICRO DEVICES), AGXD533AAXF0CC Datasheet - Page 500

• Manufacturer Part Number: AGXD533AAXF0CC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AGXD533AAXF0CC

• Device Core: X86
• Device Core Size: 64b
• Frequency (max): 400MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5V
• Operating Supply Voltage (max): 1.58V
• Operating Supply Voltage (min): 1.42V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 368
• Package Type: BGD
• Lead Free Status / Rohs Status: Not Compliant

500
AAA ASCII Adjust AL after Addition
AAD ASCII Adjust AX before Divide
AAM ASCII Adjust AX after Multiply
AAS ASCII Adjust AL after Subtract
ADC Add with Carry
ADD Integer Add
AND Boolean AND
ARPL Adjust Requested Privilege Level
BOUND Check Array Boundaries
BSF Scan Bit Forward
BSR Scan Bit Reverse
BSWAP Byte Swap
BT Test Bit
BTC Test Bit and Complement
Divide by non-zero
Divide by zero
Register to Register
Register to Memory
Memory to Register
Immediate to Register/Memory
Immediate to Accumulator
Register to Register
Register to Memory
Memory to Register
Immediate to Register/Memory
Immediate to Accumulator
Register to Register
Register to Memory
Memory to Register
Immediate to Register/Memory
Immediate to Accumulator
To Memory DST[1:0] < SRC[1:0]
To Memory DST[1:0] >= SRC[1:0]
To Register DST[1:0] < SRC[1:0]
To Register DST[1:0] >= SRC[1:0]
If Below Range (Interrupt #5)
If Above Range (Interrupt #5)
If In Range
Register, Register/Memory
Register, Register/Memory
Register/Memory, Immediate
Register, Register
Memory, Register
Register/Memory, Immediate
Register, Register
Memory, Register
Instruction
31505E
Table 8-26. Processor Core Instruction Set
37
D5 0A
D4 0A
3F
1 [00dw] [11 reg r/m]
1 [000w] [mod reg r/m]
1 [001w] [mod reg r/m]
8 [00sw] [mod 010 r/m]###
1 [010w] ###
0 [00dw] [11 reg r/m]
0 [000w] [mod reg r/m]
0 [001w] [mod reg r/m]
8 [00sw] [mod 000 r/m]###
0 [010w] ###
2 [00dw] [11 reg r/m]
2 [000w] [mod reg r/m]
2 [001w] [mod reg r/m]
8 [00sw] [mod 100 r/m]###
2 [010w] ###
63 [mod reg r/m]
62 [mod reg r/m]
0F BC [mod reg r/m]
0F BD [mod reg r/m]
0F C[1 reg]
0F BA [mod 100 r/m]#
0F A3 [mod reg r/m]
0F A3 [mod reg r/m]
0F BA [mod 111 r/m]#
0F BB [mod reg r/m]
0F BB [mod reg r/m]
Opcode
(Reg/Cache Hit)
8+INT
8+INT
Mode
Real
Clock Count
15
18
3
4
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
6
2
2
1
1
1
7
2
2
8
Prot’d
8+INT
Mode
8+INT
15
18
3
4
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
6
4
4
4
6
2
2
1
1
1
7
2
2
8
AMD Geode™ GX Processors Data Book
O D I
F F F F F F F F F
u
u -
u -
u -
x
x
0 -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- -
-
-
-
-
-
-
-
-
-
-
-
-
-
T S Z A P C
-
-
-
-
-
-
-
-
-
-
-
-
-
- u u x
Flags
x
x
u u x
x
x
x
-
-
-
-
-
-
-
x
x
x
x
x
x
-
x
x
-
-
-
u x
u x
x
x
u x
-
-
-
-
-
-
-
u x
u x
x
x
-
-
-
-
-
-
-
u
u
x
x
0
-
-
-
-
-
x
x
Instruction Set
Mode
Real
b, e
b
b
b
a
b
b
b
b
Notes
Prot’d
g,h,j,k,
Mode
h
h
h
h
h
h
h
h
r