PC87393VJG National Semiconductor, PC87393VJG Datasheet - Page 43

• Manufacturer Part Number: PC87393VJG
• Description: IC, SUPER I/O DEVICE, TQFP-100
• Manufacturer: National Semiconductor

Specifications of PC87393VJG

• Data Rate: 2Mbps
• Supply Voltage Range: 3V to 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: 0°C to +70°C
• Termination Type: SMD
• Transceiver Type: Interface
• Rohs Compliant: No

2.0 Device Architecture and Configuration
2.10.7 SuperI/O Configuration 6 Register (SIOCF6)
Write access to this register can be inhibited by setting bit 7. Activation of each logical device (bits 0-4) is also affected by
bit 0 of the logical device Activate register, index 30h and bit 0 of the SIOCF1 register.
Location:
Type:
2.10.8 SuperI/O Revision ID Register (SRID)
This register contains the ID number of the specific family member (Chip ID) and the chip revision number (Chip Rev). The
Chip Rev field identity number the chip revision.
Location:
Type:
Bit
Name
Reset
Bit
Name
Reset
6-5
Bit
7-5
4-0
Bit
7
4
3
2
1
0
SIOCF6 Software Lock. When this bit is set to 1 by software, it can be cleared only by hardware reset.
0: Write access to bits 0-6 of this register enabled (default)
1: Bits 6-0 of this register are RO
General-Purpose Scratch
Reserved
Serial Port 1 Disable
0: Enabled (default)
1: Disabled
Serial Port 2 Disable
0: Enabled (default)
1: Disabled
Parallel Port Disable
0: Enabled (default)
1: Disabled
FDC Disable
0: Enabled (default)
1: Disabled
Chip ID.
Chip Rev. These bits identify the device revision.
Index 26h
R/W
Index 27h
RO
Software
SIOCF6
Lock
7
0
7
0
Chip ID
General-Purpose
6
0
6
0
Scratch
5
0
5
0
Reserved
Description
Description
43
4
0
4
X
(Continued)
Serial Port 1
Disable
X
3
0
3
Serial Port 2
Chip Rev
Disable
X
2
0
2
Parallel Port
Disable
X
1
0
1
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Disable
FDC
X
0
0
0