PC87393VJG National Semiconductor, PC87393VJG Datasheet - Page 64

• Manufacturer Part Number: PC87393VJG
• Description: IC, SUPER I/O DEVICE, TQFP-100
• Manufacturer: National Semiconductor

Specifications of PC87393VJG

• Data Rate: 2Mbps
• Supply Voltage Range: 3V to 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: 0°C to +70°C
• Termination Type: SMD
• Transceiver Type: Interface
• Rohs Compliant: No

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2.0 Device Architecture and Configuration
2.18 MIDI PORT (MIDI) CONFIGURATION
This section applies to the PC87393 and PC87393F only.
2.18.1 Logical Device 12 (MIDI) Configuration
Table 26 lists the configuration registers which affect the MIDI Port. Only the last register (F0h) is described here. See Sec-
tions 2.2.3 and 2.2.4 for a detailed description of the others.
2.18.2 MIDI Port Configuration Register
This register is reset by hardware to 00h.
Location:
Type:
Bit
Name
Reset
Usage Hints: To operate MIDI enhanced features, make sure to locate its base address within the LPC Wide Generic ad-
dress range.
When bit 3 of the MIDI configuration register is set to 0 (default), the MIDI operates in Legacy mode. In this mode, only the
MIDI IN, MIDI OUT, MIDI Status and MIDI Command registers of the MIDI are user-accessible.
When bit 3 of the MIDI configuration register is set to 1, the MIDI is operated in Enhanced mode. In this condition, all the
registers listed in the MIDI chapter are accessible.
Index
7-4
Bit
30h
60h
61h
70h
71h
74h
75h
F0h
3
2
1
0
Reserved
MIDI Enhanced Mode Enable. See Usage Hints below.
0: Disabled (default)
1: Enabled
Internal Pull-Up Enable. This bit controls the internal pull-up resistor on pin 83 (GPIO32/MDRX).
0: Disabled (default)
1: Enabled
Reserved
TRI-STATE Control. When enabled and the device is inactive, the logical device output pins are in TRI-STATE.
0: Disabled (default)
1: Enabled
Activate. When bit 0 is cleared, the registers of this logical device are not accessible.
Base Address MSB register
Base Address LSB register. Bit 0 (for A0) is read only, 0b.
Interrupt Number and wake-up on IRQ enable.
Interrupt Type. Bit 1 is read/write. Other bits are read only.
Report no DMA assignment
Report no DMA assignment
MIDI Port Configuration register
Index F0h
R/W
7
0
6
0
Configuration Register or Action
Reserved
Table 27. MIDI Configuration Registers
5
0
Description
64
4
0
(Continued)
Mode Enable
Enhanced
MIDI
3
0
Internal
Pull-Up
Enable
2
0
Varies per bit
Reserved
Type
R/W
R/W
R/W
R/W
R/W
1
0
RO
RO
TRI-STATE
Control
Reset
00h
03h
30h
00h
03h
04h
04h
00h
0
0