PC87393VJG National Semiconductor, PC87393VJG Datasheet - Page 54

• Manufacturer Part Number: PC87393VJG
• Description: IC, SUPER I/O DEVICE, TQFP-100
• Manufacturer: National Semiconductor

Specifications of PC87393VJG

• Data Rate: 2Mbps
• Supply Voltage Range: 3V to 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: 0°C to +70°C
• Termination Type: SMD
• Transceiver Type: Interface
• Rohs Compliant: No

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2.0 Device Architecture and Configuration
2.13.3 Serial Port 2 Configuration Register
This register is reset by hardware to 02h.
Location:
Type:
Bit
Name
Reset
6-3
Bit
7
2
1
0
Bank Select Enable. Enables bank switching for Serial Port 2.
0: All attempts to access the extended registers in Serial Port 2 are ignored (default).
1: Enables bank switching for Serial Port 2.
Reserved
Busy Indicator. This read only bit can be used by power management software to decide when to power-down
the Serial Port 2 logical device.
0: No transfer in progress (default).
1: Transfer in progress.
Power Mode Control. When the logical device is active in:
0: Low power mode
1: Normal power mode
TRI-STATE Control. When enabled and the device is inactive, the logical device output pins are in TRI-STATE.
One exception is the IRTX pin, which is driven to 0 when Serial Port 2 is inactive and is not affected by this bit.
0: Disabled (default)
1: Enabled
Serial Port 2 clock disabled. The output signals are set to their default states. The RI input signal can be
programmed to generate an interrupt. Registers are maintained (unlike Active bit in index 30 that also
prevents access to Serial Port 2 registers).
Serial Port 2 clock enabled. Serial Port 2 is functional when the logical device is active (default).
Index F0h
R/W
Enable
Select
Bank
7
0
6
0
5
0
Reserved
Description
54
4
0
(Continued)
3
0
Indicator
Busy
2
0
Control
Power
Mode
1
1
TRI-STATE
Control
0
0