PC87393VJG National Semiconductor, PC87393VJG Datasheet - Page 94

• Manufacturer Part Number: PC87393VJG
• Description: IC, SUPER I/O DEVICE, TQFP-100
• Manufacturer: National Semiconductor

Specifications of PC87393VJG

• Data Rate: 2Mbps
• Supply Voltage Range: 3V to 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: 0°C to +70°C
• Termination Type: SMD
• Transceiver Type: Interface
• Rohs Compliant: No

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5.0 Game Port (GMP)
5.3.14 Game Port Event Polarity Register (GMPEPOL)
This register defines the polarity of button events on which the Game Port issues an interrupt request.
This register is functional only in Enhanced mode.
Location:
Type:
Bit
Name
Reset
7-6
5-4
3-2
1-0
Bit
Device B Button 1 Event Polarity. This bit defines the event polarity on which Device B Button 1 issues an
interrupt request.
Bits
7 6
0 0
0 1
1 0
1 1
Device B Button 0 Event Polarity. Same as bits 7-6 of this register, but for Device B Button 0.
Bits
5 4
0 0
0 1
1 0
1 1
Device A Button 1 Event Polarity. Same as bits 7-6 of this register, but for Device A Button 1.
Bits
3 2
0 0
0 1
1 0
1 1
Device A Button 0 Event Polarity. Same as bits 7-6 of this register, but for Device A Button 0.
Bits
1 0
0 0
0 1
1 0
1 1
Offset 0Ch
R/W
Device B Button 1 Event
Number
None (default)
Rising edge
Falling edge
Rising and falling edge
Number
None (default)
Rising edge
Falling edge
Rising and falling edge
Number
None (default)
Rising edge
Falling edge
Rising and falling edge
Number
None (default)
Rising edge
Falling edge
Rising and falling edge
7
0
Polarity
(Continued)
6
0
Device B Button 0 Event
5
0
Polarity
Description
94
4
0
Device A Button 1 Event
3
0
Polarity
2
0
Device A Button 0 Event
1
0
Polarity
0
0