PC87393VJG National Semiconductor, PC87393VJG Datasheet - Page 69

• Manufacturer Part Number: PC87393VJG
• Description: IC, SUPER I/O DEVICE, TQFP-100
• Manufacturer: National Semiconductor

Specifications of PC87393VJG

• Data Rate: 2Mbps
• Supply Voltage Range: 3V to 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: 0°C to +70°C
• Termination Type: SMD
• Transceiver Type: Interface
• Rohs Compliant: No

2.0 Device Architecture and Configuration
2.19.8 X-Bus Memory Configuration Register
This register is reset by hardware to 00h.
Location:
Type:
2.19.9 X-Bus Memory Base Address High Byte Register
This register describes the high byte for the user-defined memory zone mapped to the X-Bus (decoded as bits 31 to 24 of
the 32-bit address range, bits 15-0 are 0). This register is reset by hardware to 00h.
Location:
Type:
Bit
Name
Reset
Bit
Name
Reset
7-4
7-0
Bit
Bit
3
2
1
0
BIOS FWH ID. The identification nibble that is part of a FWH transaction (see Section 2.8.1 for details), which
identifies the device addressed.
BIOS FWH Enable. When set, enables PC8739x response to LPC-FWH transactions to the BIOS-FWH space,
if the BIOS FWH ID matches the ID of the transaction.. The reset value of this register is defined by the XCNF2-
0 configuration inputs. The value of this bit is later updated, based on the detected host BIOS scheme, see
Section 2.19.3 for details.
0: Disabled (default when XCNF disable BIOS configuration)
1: Enabled (default when XCNF enable BIOS configuration)
User-Defined Memory Space Enable. When set, enables the PC8739x to respond to LPC memory read and
write accesses in the user-defined memory area range. The base address and size of the user-defined range is
specified by X-Bus Memory Base Address High and Low Byte registers and the X-Bus Memory Size
Configuration register.
0: Disabled (default)
1: Enabled
BIOS Extended Space Enable. Expands the BIOS address space to which the PC8739x responds to include
the Extended BIOS address range.
0: Disabled (default)
1: Enabled
BIOS LPC Enable. Enables the PC8739x to respond to LPC memory accesses to the BIOS-LPC space. The
reset value of this register is defined by the XCNF2-0 configuration inputs. The value of this bit is later updated,
based on the detected host BIOS scheme (see Section 2.19.3 for details).
0: Disabled (default when XCNF disable BIOS configuration)
1: Enabled (default when XCNF enable BIOS configuration)
User-Defined Memory Zone Address High. Defines the higher 8 bits of the user-defined memory block base
address. The base address should be aligned on the selected block size.
Index F4h
R/W
Index F5h
R/W
7
0
7
0
6
0
6
0
BIOS FWH ID
User-Defined Memory Zone Address High
5
0
5
0
Description
Description
69
4
0
4
0
(Continued)
BIOS FWH
Enable
3
3
0
Depends on strap setting.
Memory
Defined
Enable
Space
User-
2
2
0
Extended
Enable
Space
BIOS
1
1
0
BIOS LPC
www.national.com
Enable
0
0
0