AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 121

• Manufacturer Part Number: AT32UC3A3128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A3128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

9.4.4
32002F–03/2010
Triggering trace
the data bus operation is a double word load / store, the breakpoint module will see the word
data value which corresponds to the address in BWA.
One data breakpoint module can only compare 32 bits of data. The data to be matched can
therefore not cross a word boundary if the data breakpoint is to match correctly. When the
debugger wants to match on a byte or halfword, the BWD register must be written with the LSB
aligned, and the BWC:BME bits must be set to mask the upper bits of the BWD register.
For example, if the debugger wants to match against Byte 1 in Figure 9-8, the BWA must be set
to the byte address of Byte 1 and the BWD written with the value to match on aligned to LSB.
Also the BWC:BME must be set to mask the 24 most significant bits of the BWD register (BME =
0xE).
By default, the data breakpoint module will match on the data value regardless of the size of the
access. The data BWC can also be set to match on a specific access size if the SIZE bits are
set. The debugger can for example, set the breakpoint module to match only on byte writes to
byte 1 in Figure 9-8. The BWD register must still be aligned correctly, and the byte mask must be
set, but the data breakpoint will only trigger if a single byte is written to byte 1 and not if, for
example, a whole word is written to byte 0, 1, 2, and 3.
Figure 9-8.
A watchpoint from the program or data breakpoint modules can be used to start or stop program
or data trace. This is done using a trigger unit. The trigger unit can be configured using the
watchpoint trigger register. When the trigger unit is set to start trace upon a watchpoint, DC:TM
will be set accordingly, and trace will then be enabled. If a data watchpoint enables data trace,
the data event is not included in the data trace output, while an event which disables data trace
is included in the data trace output.
Memory access data alignment.
Byte 0
3
Half w ord 0
Double w ord byte 4 to 7
Double w ord byte 0 to 3
Byte 1
Byte A ddress
2
Word
Byte 2
1
Half w ord 1
Byte 3
0
0x8010
0x800C
0x8008
0x8004
0x8000
AVR32
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