AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 137

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AT32UC3A3128

Manufacturer Part Number
AT32UC3A3128
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A3128

Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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9.7.2
9.7.2.1
9.7.3
9.7.3.1
32002F–03/2010
Messages
Registers
Ownership Trace (OT)
Ownership Trace Process ID (PID)
offers development tools a mechanism to decipher which set of symbolics and sources are
associated for lower levels of visibility and debugging.
Ownership trace information is transmitted out the AUX using an Ownership Trace Message.
OTM facilitates ownership trace by providing visibility of which process ID or operating system
task is activated. An Ownership Trace Message is transmitted to indicate when a new pro-
cess/task is activated, allowing development tools to trace ownership flow. Additionally, an
Ownership Trace Message is also transmitted periodically during runtime at a minimum fre-
quency of every 256 Program Trace or Data Trace Messages.
In the AVR32, this feature is supported through an Ownership Trace Register, which automati-
cally produces an Ownership Trace Message when written to. The RTOS scheduler routine
writes the new process ID to this register during process switching using the mtdr instruction.
The TM[0] bit in the Development Control register must be set to enable ownership trace.
If there is no room in the Transmit Queue for the message, and the CPU is not halted to prevent
overruns, an error message is produced.
Table 9-52.
The CPU should write the current Process ID value to this register, whenever the RTOS per-
forms a process switch. This will automatically create an Ownership Trace Message to be
transmitted to the tool. This register can be written from any privileged CPU mode.
Ownership Trace Message
Packet
Size
32
6
• The ownership trace message is sent:
• When the Ownership Trace Process ID (PID) register is written.
• When program trace with sync message is generated due to overflow in the periodic
• When a data trace with sync message is generated due to overflow in the periodic message
• After a Transmit Queue overrun if the CPU has written to PID when the queue was full.
message counter.
counter.
Packet
Name
PROCESS
TCODE
Ownership Trace Message
Packet
Type
Fixed
Fixed
Direction: From target
Description
Task / process ID.
Value = 2
AVR32
137

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