AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 127

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AT32UC3A3128

Manufacturer Part Number
AT32UC3A3128
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A3128

Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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9.5.4
9.5.4.1
9.5.4.2
9.5.4.3
32002F–03/2010
Messages
Program Trace, Direct Branch
Program Trace, Direct Branch with Target Address
Program Trace, Indirect Branch
PTSY. In this case, the address of the instruction which generated the branch message can not
be explicitly reconstructed from the trace log, but the debugger will normally know which address
was returned to when Debug Mode was exited.
If a breakpoint occurs on the first instruction after exiting Debug Mode, a PTC message with
EVCODE = 0 is generated.
This message is output by the target processor whenever there is a change of program flow
caused by a conditional or unconditional branch. The instruction count (I-CNT) is included to
identify the branch address. The following AVR32 instructions can cause a direct branch:
Table 9-31.
Table 9-32.
This message is transmitted instead of the Direct Branch message when SQA enhanced pro-
gram trace is enabled by writing DC:SQA to one. This simplifies real-time PC reconstruction in
the emulator for real-time code coverage and performance analysis purposes.
Table 9-33.
An indirect branch is output by the target processor whenever there is a change of program flow
caused by a subroutine call, return instruction, interrupt, or exception.
Mnemonic
br{cond3}
br{cond4}
rjmp
Direct Branch Message
Packet Size
(bits)
8
6
Direct Branch Message with Sync
Size (bits)
32
8
6
Packet
Compact
Extended
Compact
Direct branch instructions
Direct Branch message without sync
Direct Branch message with Target Address
Packet
Name
U-ADDR
I-CNT
TCODE
Packet
Name
I-CNT
TCODE
Description
Branch if condition satisfied.
Branch if condition satisfied.
Packet
Type
Variable
Fixed
Packet
Type
Variable
Variable
Fixed
Direction: From target
Description
Number of bytes executed since the last taken branch.
Value = 3
Direction: From target
Description
The unique portion of the branch target address for a taken
indirect branch or exception. Most significant bits that have a
value of 0 are truncated.
Number of bytes executed since the last taken branch.
Value = 57
AVR32
127

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