AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 61

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AT32UC3A3128

Manufacturer Part Number
AT32UC3A3128
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A3128

Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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6. Memory System
6.1
32002F–03/2010
Memory sections
AVR32UC implements a 32-bit unsegmented memory space. Regions of this memory space
can be protected by an optional MPU. The memory map is as follows:
Figure 6-1.
The memory map contains four sections, named IRAM, LOCAL, BOOT and HSB. The IRAM
section contains the internal EX stage memory, and this memory is mapped from address 0 and
upwards. The LOCAL section is mapped from address 0x4000_0000 and is designed for con-
taining device-specific high-speed interfaces, such as floating-point units, encryption hardware
or high-speed GPIO ports. Access to the LOCAL space is performed using any ordinary load
and store instructions, and is performed in a single clock cycle. Mapping timing-critical devices in
the LOCAL section is beneficial as the interface operates with high clock frequency, and its tim-
ing is deterministic since it does not need to access a shared bus which may be heavily loaded.
The BOOT section starts at address 0x8000_0000, which is the reset address for AVR32UC.
This section will typically contain an internal program FLASH, mapped from address
0x8000_0000 and upwards. The HSB section contains the addresses of all modules mapped on
the HSB bus. This may include peripherals such as USARTs and external memory interfaces.
The memory space is uniform, so program code can execute from the IRAM, BOOT and HSB
sections, and data accesses can be performed to any of the these sections. Note that implemen-
tations of AVR32UC of may forbid certain accesses to certain memory sections, eg a write to
program FLASH mapped into the BOOT section may be forbidden. The LOCAL section is only
accessible by the Load-Store Unit in the CPU EX pipeline stage, therefore, code can not be exe-
cuted from addresses in the LOCAL space.
The AVR32UC memory map.
H'FFFFFFFF
H'C0000000
H'80000000
H'40000000
H'00000000
1 GB Internal Data RAM
1GB High Speed Bus
1GB CPU Local Bus
1GB Boot Program
Memory
Memory
space
BOOT
IRAM
HSB
LOCAL
AVR32
61

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