AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 132

• Manufacturer Part Number: AT32UC3A3128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A3128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

9.6.2
9.6.3
9.6.3.1
9.6.3.2
32002F–03/2010
Using data trace channels as watchpoints
Messages
Data Trace, Data Write (DTDW)
Data Trace, Data Write with Sync (DTDWS)
Data Trace is enabled for address ranges (trace channels) specified by pairs of Data Trace Start
and End Address registers (DTSA/DTEA). Each data access within that boundary will generate
an action as specified by the corresponding bits in the Data Trace Control register (DTC). The
AVR32 OCD system currently supports two data trace channels.
While each channel can be used to trigger data trace messages, it is also possible to trigger
watchpoint messages, providing flexibility when using the OCD system. Watchpoints can be
ranged, i.e. trigger on all accesses between DTSA through DTEA, or trigger on a single location,
if DTSA and DTEA are written to the same value.
Writing TnWP to one enables a watchpoint on accesses for data trace channel n. The watch-
point message is sent as a vendor defined trace watchpoint message.
It is possible to enable both trace and watchpoint on the same channel, but typically, only one of
the options will be used.
The Trace Watchpoint Hit message is described in
This message is output by the target processor when it detects a memory write that matches the
OCD system’s data trace attributes.
Table 9-43.
This message is an alternative to the Data Trace, Data Write Message. It is output instead of a
Data Trace, Data Write Message whenever a memory write occurs that matches the debug
logic’s data trace attributes, and when one of the following conditions has occurred:
Data Trace, Data Write message
Packet
Size
8 / 16 /
32
32
2
6
1. The processor has exited from reset. This synchronization message is required to allow
2. When data trace is enabled during normal execution of the embedded processor.
the unique portion of the data write address of following Data Trace, Data Write Mes-
sages to be correctly interpreted by the tool.
Packet
Name
DATA
U-ADDR
DSZ
TCODE
Data Trace, Data Write message
Packet
Type
Variable
Variable
Fixed
Fixed
Direction: From target
Description
The data value written. The size will vary depending on the load
/ store instruction being traced.
The unique portion of the data write address, which is relative to
the previous Data Trace Message (read or write).
Data size:
00 = 8 bits
01 = 16 bits
10 = 32 bits
Value=5
Section 9.4.5.2 on page
122.
AVR32
132