PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 124

• Manufacturer Part Number: PIC18F258
• Description: High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18FXX8
15.1
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. All are readable and writable.
Table 15-1 shows the timer resources of the CCP
module modes.
TABLE 15-1:
15.2
In Capture mode, CCPR1H:CCPR1L captures the
16-bit value of the TMR1 or TMR3 register when an
event occurs on pin RC2/CCP1. An event is defined as:
• every falling edge
• every rising edge.
• every 4th rising edge
• every 16th rising edge
TABLE 15-2:
DS41159B-page 122
Capture
Capture
Compare
PWM
PWM
PWM
CCP1
Mode
CCP1 Mode
Compare
CCP1 Module
Capture Mode
Capture
PWM
Capture
Compare
Compare
PWM
Capture
Compare
ECCP1
CCP1 MODE - TIMER
INTERACTION OF CCP1 AND ECCP1 MODULES
RESOURCE
Mode
TMR1 or TMR3 time-base. Time-base can be different for each CCP.
or TMR3, depending upon which time-base is used.
The compare(s) could be configured for the special event trigger, which clears TMR1 or
TMR3, depending upon which time-base is used.
The compare could be configured for the special event trigger, which clears either TMR1
The PWMs will have the same frequency and update rate (TMR2 interrupt).
None.
None.
Timer Resource
Timer1 or Timer3
Timer1 or Timer3
Timer2
Preliminary
An event is selected by control bits CCP1M3:CCP1M0
(CCP1CON<3:0>). When a capture is made, the inter-
rupt request flag bit CCP1IF (PIR registers) is set. It
must be cleared in software. If another capture occurs
before the value in register CCPR1 is read, the old
captured value will be lost.
15.2.1
In Capture mode, the RC2/CCP1 pin should be
configured as an input by setting the TRISC<2> bit.
15.2.2
The timers used with the capture feature (either Timer1
and/or Timer3) must be running in Timer mode or Syn-
chronized Counter mode. In Asynchronous Counter
mode, the capture operation may not work. The timer
used with each CCP module is selected in the T3CON
register.
Note:
Interaction
If the RC2/CCP1 is configured as an out-
put, a write to the port can cause a capture
condition.
CCP PIN CONFIGURATION
TIMER1/TIMER3 MODE SELECTION
 2002 Microchip Technology Inc.