PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 73

• Manufacturer Part Number: PIC18F258
• Description: High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
• Manufacturer: MICROCHIP [Microchip Technology]

6.5
The minimum programming block is 4 words or 8 bytes.
Word or byte programming is not supported.
Table Writes are used internally to load the holding reg-
isters needed to program the FLASH memory. There
are 8 holding registers used by the Table Writes for
programming.
Since the Table Latch (TABLAT) is only a single byte,
the TBLWT instruction has to be executed 8 times for
each programming operation. All of the Table Write
operations will essentially be short writes, because only
the holding registers are written. At the end of updating
8 registers, the EECON1 register must be written to, to
start the programming operation with a long write.
The long write is necessary for programming the inter-
nal FLASH. Instruction execution is halted while in a
long write cycle. The long write will be terminated by
the internal programming timer.
The EEPROM on-chip timer controls the write time.
The write/erase voltages are generated by an on-chip
charge pump rated to operate over the voltage range of
the device for byte or word operations.
6.5.1
The sequence of events for programming an internal
program memory location should be:
1.
2.
3.
4.
FIGURE 6-5:
 2002 Microchip Technology Inc.
TBLPTR = xxxxx0
Read 64 bytes into RAM.
Update data values in RAM as necessary.
Load Table Pointer with address being erased.
Do the row erase procedure.
Writing to FLASH Program
Memory
FLASH PROGRAM MEMORY WRITE
SEQUENCE
Holding Register
8
TABLE WRITES TO FLASH PROGRAM MEMORY
TBLPTR = xxxxx1
Holding Register
8
Preliminary
Program Memory
TBLPTR = xxxxx2
Write Register
TABLAT
5.
6.
7.
8.
9.
10. Write AAh to EECON2.
11. Set the WR bit. This will begin the write cycle.
12. The CPU will stall for duration of the write (about
13. Execute a NOP.
14. Re-enable interrupts.
15. Repeat steps 6-14 seven times, to write 64
16. Verify the memory (Table Read).
This procedure will require about 18 ms to update one
row of 64 bytes of memory. An example of the required
code is given in Example 6-3.
Holding Register
Note 1: A NOP is needed after the WR command
Load Table Pointer with address of first byte
being written.
Write the first 8 bytes into the holding registers
using the TBLWT instruction, auto-increment
may be used.
Set the EECON1 register for the write operation:
• set the EEPGD bit to point to program memory;
• clear the CFGS bit to access program memory;
• set the WREN to enable byte writes.
Disable interrupts.
Write 55h to EECON2.
2 ms using internal timer).
bytes.
2: Before setting the WR bit, the Table
3: Holding registers are cleared on RESET
8
to ensure proper code execution.
Pointer address needs to be within the
range of addresses of the 8 bytes in the
holding registers.
and at the completion of each write cycle.
TBLPTR = xxxxx7
PIC18FXX8
Holding Register
DS41159B-page 71
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