PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 62

• Manufacturer Part Number: PIC18F258
• Description: High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18FXX8
REGISTER 5-1:
DS41159B-page 60
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
EECON1 REGISTER
bit 7
EEPGD: FLASH Program or Data EEPROM Memory Select bit
1 = Access program FLASH memory
0 = Access data EEPROM memory
CFGS: FLASH Program/Data EE or Configuration Select bit
1 = Access configuration registers
0 = Access program FLASH or data EEPROM memory
Unimplemented: Read as '0'
FREE: FLASH Row Erase Enable bit
1 = Erase the program memory row addressed by TBLPTR on the next WR command
0 = Perform write only
WRERR: Write Error Flag bit
1 = A write operation is prematurely terminated
0 = The write operation completed
Note:
WREN: Write Enable bit
1 = Allows write cycles
0 = Inhibits write to the EEPROM or FLASH memory
WR: Write Control bit
1 = Initiates a data EEPROM erase/write cycle or a program memory erase cycle or write cycle
0 = Write cycle is complete
RD: Read Control bit
1 = Initiates an EEPROM read
0 = Does not initiate an EEPROM read
Legend:
R = Readable bit
- n = Value at POR
EEPGD
R/W-x
(reset by hardware)
(any MCLR or any WDT Reset during self-timed programming in normal operation)
(The operation is self-timed and the bit is cleared by hardware once write is complete. The
WR bit can only be set (not cleared) in software.)
(Read takes one cycle. RD is cleared in hardware. The RD bit can only be set (not cleared)
in software. RD bit cannot be set when EEPGD = 1.)
When a WRERR occurs, the EEPGD or FREE bits are not cleared. This allows tracing
of the error condition.
R/W-x
CFGS
Preliminary
U-0
—
W = Writable bit
’1’ = Bit is set
R/W-0
FREE
WRERR
R/W-x
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
WREN
R/W-0
 2002 Microchip Technology Inc.
x = Bit is unknown
R/S-0
WR
R/S-0
RD
bit 0