PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 244

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PIC18F258

Manufacturer Part Number
PIC18F258
Description
High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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PIC18FXX8
20.2
The A/D conversion time per bit is defined as T
A/D conversion requires 12 T
The source of the A/D conversion clock is software
selectable. The seven possible options for T
• 2 T
• 4 T
• 8 T
• 16 T
• 32 T
• 64 T
• Internal RC oscillator.
For correct A/D conversions, the A/D conversion clock
(T
of 1.6 µs.
Table 20-1 shows the resultant T
the device operating frequencies and the A/D clock
source selected.
TABLE 20-1:
TABLE 20-2:
DS41159B-page 242
Legend: Shaded cells are outside of recommended range.
Note 1: The RC source has a typical T
Legend: Shaded cells are outside of recommended range.
Note 1: The RC source has a typical T
AD
) must be selected to ensure a minimum T
Operation
Operation
OSC
OSC
OSC
16 T
32 T
64 T
16 T
32 T
64 T
2 T
4 T
8 T
2 T
4 T
8 T
OSC
OSC
OSC
2: These values violate the minimum required T
3: For faster conversion times, the selection of another clock source is recommended.
2: These values violate the minimum required T
3: For faster conversion times, the selection of another clock source is recommended.
AD Clock Source (T
AD Clock Source (T
RC
RC
Selecting the A/D Conversion Clock
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
T
T
AD
AD
ADCS2:ADCS0
ADCS2:ADCS0
vs. DEVICE OPERATING FREQUENCIES
vs. DEVICE OPERATING FREQUENCIES (FOR EXTENDED, LC DEVICES)
000
100
001
101
010
110
011
000
100
001
101
010
110
011
AD
AD
AD
)
)
per 10-bit conversion.
AD
times derived from
AD
AD
3 - 9 µs
AD
time of 4 µs.
time of 6 µs.
2 - 6 µs
100 ns
200 ns
400 ns
800 ns
500 ns
1.0 µs
2.0 µs
4.0 µs
20 MHz
16.0 µs
4 MHz
1.6 µs
3.2 µs
8.0 µs
AD
AD
are:
. The
time
Preliminary
(2)
(2)
(2)
(1,4)
(2)
(2)
(2)
(2)
(2)
(1)
AD
AD
time.
time.
3 - 9 µs
20.3
The ADCON1, TRISA and TRISE registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their corresponding
TRIS bits set (input). If the TRIS bit is cleared (output),
the digital output level (V
The A/D operation is independent of the state of the
CHS2:CHS0 bits and the TRIS bits.
2 - 6 µs
400 ns
800 ns
1.0 µs
2.0 µs
12.8 µs
16.0 µs
32.0 µs
5 MHz
2 MHz
1.6 µs
3.2 µs
6.4 µs
4.0 µs
8.0 µs
Note 1: When reading the port register, all pins con-
Device Frequency
Device Frequency
(1,4)
(2)
(2)
(2)
(2)
(1)
Configuring Analog Port Pins
2: Analog levels on any pin that is defined as
figured as analog input channels will read
as cleared (a low level). Pins configured as
digital inputs will convert an analog input.
Analog levels on a digitally configured input
will not affect the conversion accuracy.
a digital input (including the AN4:AN0
pins) may cause the input buffer to con-
sume current that is out of the devices
specification.
3 - 9 µs
2 - 6 µs
1.25 MHz
25.6 µs
51.2 µs
1.25 MHz
25.6 µs
51.2 µs
1.6 µs
3.2 µs
12.8 µs
12.8 µs
1.6 µs
3.2 µs
6.4 µs
6.4 µs
 2002 Microchip Technology Inc.
OH
(1,4)
(2)
(2)
or V
(3)
(3)
(1)
(3)
(3)
OL
) will be converted.
333.33 kHz
333.33 kHz
3 - 9 µs
2 - 6 µs
192 µs
192 µs
24 µs
48 µs
96 µs
24 µs
48 µs
96 µs
12 µs
12 µs
6 µs
6 µs
(3)
(3)
(3)
(3)
(3)
(3)
(1,4)
(3)
(3)
(1)

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