PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 299

• Manufacturer Part Number: PIC18F258
• Description: High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
• Manufacturer: MICROCHIP [Microchip Technology]

DECFSZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
2002 Microchip Technology Inc.
Before Instruction
After Instruction
operation
operation
operation
Decode
No
No
No
Q1
Q1
PC
CNT
If CNT
If CNT
Q1
PC =
PC =
=
=
=
register ’f’
operation
operation
operation
Decrement f, skip if 0
[ label ] DECFSZ f [,d [,a]]
0
d
a
(f) – 1
skip if result = 0
None
The contents of register 'f' are dec-
remented. If 'd' is 0, the result is
placed in W. If 'd' is 1, the result is
placed back in register 'f' (default).
If the result is 0, the next instruc-
tion, which is already fetched, is
discarded, and a NOP is executed
instead, making it a two-cycle
instruction. If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ = 1, then the
bank will be selected as per the
BSR value (default).
1
1(2)
Note: 3 cycles if skip and followed
HERE
CONTINUE
Read
0010
No
No
No
Q2
Q2
Q2
Address (HERE)
CNT - 1
0;
Address (CONTINUE)
0;
Address (HERE+2)
f
[0,1]
[0,1]
255
by a 2-word instruction.
dest,
11da
operation
operation
operation
DECFSZ
GOTO
Process
Data
No
No
No
Q3
Q3
Q3
ffff
CNT
LOOP
destination
operation
operation
operation
Write to
No
No
No
Q4
Q4
Q4
ffff
DCFSNZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Before Instruction
After Instruction
operation
operation
operation
Decode
TEMP
TEMP
If TEMP
If TEMP
No
No
No
Q1
Q1
Q1
PC
PC
register ’f’
operation
operation
operation
Decrement f, skip if not 0
[ label ] DCFSNZ
0
d
a
(f) – 1
skip if result
None
The contents of register 'f' are dec-
remented. If 'd' is 0, the result is
placed in W. If 'd' is 1, the result is
placed back in register 'f' (default).
If the result is not 0, the next
instruction, which is already
fetched, is discarded, and a NOP is
executed instead, making it a
two-cycle instruction. If ’a’ is 0, the
Access Bank will be selected,
overriding the BSR value. If ’a’ = 1,
then the bank will be selected as
per the BSR value (default).
1
1(2)
Note: 3 cycles if skip and followed
HERE
ZERO
NZERO
Read
0100
No
No
No
Q2
Q2
Q2
f
[0,1]
[0,1]
PIC18FXX8
255
by a 2-word instruction.
=
=
=
=
=
dest,
DCFSNZ
:
:
11da
operation
operation
operation
?
TEMP - 1,
0;
Address (ZERO)
0;
Address (NZERO)
Process
Data
0
No
No
No
Q3
Q3
Q3
DS41159B-page 297
ffff
TEMP
f [,d [,a]]
destination
operation
operation
operation
Write to
No
No
No
Q4
Q4
Q4
ffff