AT91SAM9RL64-CU Atmel, AT91SAM9RL64-CU Datasheet - Page 169

IC ARM9 MCU 217-LFBGA

AT91SAM9RL64-CU

Manufacturer Part Number
AT91SAM9RL64-CU
Description
IC ARM9 MCU 217-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM9RL64-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
240MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
AC'97, LCD, POR, PWM, WDT
Number Of I /o
118
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
72K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
2-Wire, SPI, SSC, USART
Maximum Clock Frequency
240 MHz
Number Of Programmable I/os
118
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Controller Family/series
AT91SAM9xxx
No. Of I/o's
118
Ram Memory Size
64KB
Cpu Speed
240MHz
No. Of Timers
1
Rohs Compliant
Yes
Package
217LFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
240 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
AT91SAM9RL-EK - KIT EVAL FOR AT91SAM9RLAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Figure 22-7. Connection of 2x16-bit Data Bus on a 32-bit Data Bus (Byte Select Option)
Table 22-3.
22.8
6289C–ATARM–28-May-09
Signal Name
Device Type
Byte Access Type (BAT)
NBS0_A0
NWE_NWR0
NBS1_NWR1
NBS2_NWR2_A1
NBS3_NWR3
Standard Read and Write Protocols
SMC Multiplexed Signal Translation
In the following sections, the byte access type is not considered. Byte select lines (NBS0 to
NBS3) always have the same timing as the A address bus. NWE represents either the NWE sig-
nal in byte select access type or one of the byte write lines (NWR0 to NWR3) in byte write
access type. NWR0 to NWR3 have the same timings and protocol as NWE. In the same way,
NCS represents one of the NCS[0..5] chip select lines.
Byte Select
1x32-bit
NBS0
NBS1
NBS2
NBS3
NWE
SMC
D[31:16]
D[15:0]
NCS[3]
A[25:2]
NBS0
NBS1
NBS2
NBS3
NRD
NWE
Byte Select
32-bit Bus
2x16-bit
NBS0
NBS1
NBS2
NBS3
NWE
AT91SAM9R64/RL64 Preliminary
Byte Write
4 x 8-bit
NWR0
NWR1
NWR2
NWR3
Byte Select
1x16-bit
A[23:0]
Low Byte Enable
High Byte Enable
Read Enable
Memory Enable
D[15:0]
Write Enable
A[23:0]
Write Enable
Low Byte Enable
High Byte Enable
Read Enable
Memory Enable
D[31:16]
NBS0
NBS1
NWE
A1
16-bit Bus
Byte Write
2 x 8-bit
NWR0
NWR1
A1
8-bit Bus
1 x 8-bit
NWE
A0
A1
169

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