AT91SAM9RL64-CU Atmel, AT91SAM9RL64-CU Datasheet - Page 873

• Manufacturer Part Number: AT91SAM9RL64-CU
• Description: IC ARM9 MCU 217-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9RL64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 118
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 118
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM9RL-EK - KIT EVAL FOR AT91SAM9RLAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 44-38. SSC Timings (Continued)
Notes:
6289C–ATARM–28-May-09
Symbol
SSC
SSC
SSC
SSC
SSC
SSC
8
9
10
11
12
13
1. Timings SSC4 and SSC7 depend on the start condition. When STTDLY = 0 (Receive start delay) and START = 4, or 5 or 7
2. For output signals (TF, TD, RF), Min and Max access times are defined. The Min access time is the time between the TK (or
(Receive Start Selection), two Periods of the MCK must be added to timings.
RK) edge and the signal change. The Max access timing is the time between the TK edge and the signal stabilization. Figure
18 illustrates Min and Max accesses for SSC0. The same applies for SSC1, SSC4, and SSC7, SSC10 and SSC13.
Parameter
RF/RD setup time before RK edge (RK input)
RF/RD hold time after RK edge (RK input)
RK edge to RF (RK input)
RF/RD setup time before RK edge (RK output)
RF/RD hold time after RK edge (RK output)
RK edge to RF (RK output)
Cond
STH corner, VDDIO = 1.8V
STH corner, VDDIO = 3.3V
MAX corner, VDDIO = 1.8V
MAX corner, VDDIO = 3.3V
STH corner, VDDIO = 1.8V
STH corner, VDDIO = 3.3V
MAX corner, VDDIO = 1.8V
MAX corner, VDDIO = 3.3V
STH corner, VDDIO = 1.8V
STH corner, VDDIO = 3.3V
MAX corner, VDDIO = 1.8V
MAX corner, VDDIO = 3.3V
STH corner, VDDIO = 1.8V
STH corner, VDDIO = 3.3V
MAX corner, VDDIO = 1.8V
MAX corner, VDDIO = 3.3V
STH corner, VDDIO = 1.8V
STH corner, VDDIO = 3.3V
MAX corner, VDDIO = 1.8V
MAX corner, VDDIO = 3.3V
STH corner, VDDIO = 1.8V
STH corner, VDDIO = 3.3V
MAX corner, VDDIO = 1.8V
MAX corner, VDDIO = 3.3V
AT91SAM9R64/RL64 Preliminary
t
t
CPMCK
CPMCK
t
t
t
t
t
t
11.1
11.1
13.3
13.3
t
t
t
t
CPMCK
CPMCK
11.1 -
11.8 -
12.6 -
13.7 -
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
CPMCK
10.7
10.7
Min
0
0
0
0
0
0
0
0
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
- 8.8
- 8.8
-
-
12.9
13.9
15.2
16.3
1.8
2.8
1.8
2.9
Max
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
873