AT91SAM9RL64-CU Atmel, AT91SAM9RL64-CU Datasheet - Page 655

• Manufacturer Part Number: AT91SAM9RL64-CU
• Description: IC ARM9 MCU 217-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9RL64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 118
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 118
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM9RL-EK - KIT EVAL FOR AT91SAM9RLAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

39.5.2.4
Table 39-3.
6289C–ATARM–28-May-09
Pixel 1bpp 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
Pixel 2bpp
Pixel 4bpp
Pixel 8bpp
Pixel
16bpp
Pixel
24bpp
packed
Pixel
24bpp
packed
Pixel
24bpp
packed
Pixel
24bpp
unpacked
Mem Addr
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
15
Serializer
Little Endian Memory Organization
7
14
not used
0x3
3
1
This block serializes the data read from memory. It reads words from the FIFO and outputs pix-
els (1 bit, 2 bits, 4 bits, 8 bits, 16 bits or 24 bits wide) depending on the format specified in the
PIXELSIZE field of the LCDCON2 register. It also adapts the memory-ordering format. Both big-
endian and little-endian formats are supported. They are configured in the MEMOR field of the
LCDCON2 register.
The organization of the pixel data in the memory depends on the configuration and is shown in
Table 39-3
Note:
13
6
For a color depth of 24 bits per pixel there are two different formats supported: packed and
unpacked. The packed format needs less memory but has some limitations when working in 2D
addressing mode
12
and
1
2
11
Table
5
39-4.
10
(See “2D Memory Addressing” on page
0x2
3
2
9
AT91SAM9R64/RL64 Preliminary
4
8
7
3
6
0
0
0x1
1
674.).
5
2
4
8
8
0
1
7
7
3
6
6
1
5
5
2
4
4
0x0
0
2
3
3
1
2
2
0
1
1
655
0
0
0