AT91SAM9RL64-CU Atmel, AT91SAM9RL64-CU Datasheet - Page 825

• Manufacturer Part Number: AT91SAM9RL64-CU
• Description: IC ARM9 MCU 217-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9RL64-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, LCD, POR, PWM, WDT
• Number Of I /o: 118
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 72K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 2-Wire, SPI, SSC, USART
• Maximum Clock Frequency: 240 MHz
• Number Of Programmable I/os: 118
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Controller Family/series: AT91SAM9xxx
• No. Of I/o's: 118
• Ram Memory Size: 64KB
• Cpu Speed: 240MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 240 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: AT91SAM9RL-EK - KIT EVAL FOR AT91SAM9RLAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

43. Touch Screen ADC Controller
43.1
6289C–ATARM–28-May-09
Description
The Touch Screen ADC Controller is based on a Successive Approximation Register (SAR) 10-
bit Analog-to-Digital Converter (ADC). It also integrates:
The conversions extend from 0V to TSADVREF.
The TSADCC supports an 8-bit or 10-bit resolution mode, and conversion results are reported in
a common register for all channels, as well as in a channel-dedicated register.
Conversions can be started for all enabled channels, either by a software trigger, by detection of
a rising edge on the external trigger pin TSADTRG or by an integrated programmable timer.
When the Touch Screen is enabled, a timer-triggered sequencer automatically configures the
power switches, performs the conversions and stores the results in dedicated registers.
The TSADCC also integrates a Sleep Mode and a Pen-Detect Mode and connects with one
PDC channel. These features reduce both power consumption and processor intervention.
The TSADCC timings, like the Startup Time and Sample and Hold Time, are fully configurable.
• a 6-to-1 analog multiplexer for analog-to-digital conversions of up to 6 analog lines
• 4 power switches that measure both axis positions on the resistive touch screen panel
• 1 additional power switch and an embedded resistor that detects pen-interrupt and pen loss
AT91SAM9R64/RL64 Preliminary
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