MCF5272CVF66J Freescale Semiconductor, MCF5272CVF66J Datasheet - Page 233
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MCF5272CVF66J
Manufacturer Part Number
MCF5272CVF66J
Description
IC MCU 166MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Leaded Process Compatible
No
Rohs Compliant
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5272CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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11.5.5
The RDAR register,
the receive descriptor ring has been updated (empty receive buffers have been produced by the driver with
the E bit set).
The R_DES_ACTIVE bit is set whenever the register is written. This is independent of the data actually
written by the user. When set, the FEC polls the receive descriptor ring and processes receive frames
(provided ETHER_EN is also set). As soon as the FEC polls a receive descriptor whose E bit is not set, it
clears the R_DES_ACTIVE bit and stops polling the receive descriptor ring.
The RDAR register is cleared at reset and when ETHER_EN is cleared.
Table 11-11
Freescale Semiconductor
31–25
23–0
Bit
24
Reset
Reset
Field
Field
Addr
R/W
R/W
R_DES_ACTIVE
31
15
Receive Descriptor Active Register (RDAR)
describes the RDAR fields.
Name
—
—
Figure
MCF5272 ColdFire
—
Figure 11-9. Receive Descriptor Active Register (RDAR)
Reserved, should be cleared.
Set when this register is written, regardless of the value written. Cleared by the FEC whenever
no additional empty descriptors remain in the receive ring.
Reserved, should be cleared.
11-9, is a command register that should be written by the user to indicate that
Table 11-11. RDAR Register Field Descriptions
25
®
Integrated Microprocessor User’s Manual, Rev. 3
R_DES_ACTIVE
0000_0000_0000_0000
0000_0000_0000_0000
24
MBAR + 0x850
Read/Write
Read/Write
—
Description
23
—
Ethernet Module
16
0
11-15
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