MCF5272CVF66J Freescale Semiconductor, MCF5272CVF66J Datasheet - Page 435
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MCF5272CVF66J
Manufacturer Part Number
MCF5272CVF66J
Description
IC MCU 166MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Leaded Process Compatible
No
Rohs Compliant
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5272CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Signal Descriptions
19.10.2 Receive Serial Data Input (URT0_RxD/PB1)
UART0 mode: URT0_RxD is the receiver serial data input for the UART0 module. Data received on this
pin is sampled on the rising edge of the serial clock source lsb first. When the UART0 clock is stopped for
power-down mode, any transition on this pin restarts it.
Port B mode: This pin can also be configured as the PB1 I/O.
19.10.3 Clear-to-Send (URT0_CTS/PB2)
UART0 mode: Asserting the URT0_CTS input is the clear-to-send (CTS) input, indicating to the UART0
module that it can begin data transmission.
Port B mode: This pin can also be configured as the PB2 I/O.
19.10.4 Request to Send (URT0_RTS/PB3)
UART0 mode: Asserting URT0_RTS output is an automatic request to send output from the UART0
module. URT0_RTS can also be configured to be asserted and negated as a function of the RxFIFO level.
Port B mode: This pin can also be configured as the PB3 I/O.
19.10.5 Clock (URT0_CLK/PB4)
UART0 mode: URT0_CLK provides a clock input that can be a 1x or 16x baud rate clock.
Port B mode: This pin can also be configured as the PB4 I/O.
19.11 USB Module Signals and PA[6:0]
The USB module uses the signals in this section for data and clock signals. These signals are multiplexed
with the GPIO port A signals PA[6:0].
19.11.1 USB Transmit Serial Data Output (USB_TP/PA0)
USB mode: USB_TP is the non-inverted data transmit output.
Port A mode: This pin can also be configured as the PA0 I/O.
19.11.2 USB Receive Serial Data Input (USB_RP/PA1)
USB mode: USB_RP is the non-inverted receive data input.
Port A mode: This pin can also be configured as the PA1 I/O.
19.11.3 USB Receive Data Negative (USB_RN/PA2)
USB mode: USB_RN is the inverted receive data input.
Port A mode: This pin can also be configured as the PA2 I/O.
®
MCF5272 ColdFire
Integrated Microprocessor User’s Manual, Rev. 3
Freescale Semiconductor
19-25
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