MCF5272CVF66J Freescale Semiconductor, MCF5272CVF66J Datasheet - Page 415

• Manufacturer Part Number: MCF5272CVF66J
• Description: IC MCU 166MHZ 196MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVF66J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Leaded Process Compatible: No
• Rohs Compliant: No
• Peak Reflow Compatible (260 C): No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: No

Freescale Semiconductor
(see notes)
Configured
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
WSEL pin
by
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
GDCL1_OUT
DRESETEN
0 (Reset)
DDATA0
DDATA1
DDATA2
DDATA3
DOUT1
E_COL
E_CRS
DCL1/
DIN1
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
HIZ
D3
D4
D5
D6
D7
D8
D9
Table 19-1. Signal Descriptions Sorted by Function (Sheet 3 of 8)
MCF5272 ColdFire
Pin Functions
PC3
PC4
PC5
PC6
PC7
PC8
PC9
D10
D11
D12
D13
D14
D15
D4
D5
D6
D7
D8
D9
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—
—
—
—
—
—
—
—
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1
®
Integrated Microprocessor User’s Manual, Rev. 3
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—
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—
—
—
—
—
—
—
2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3
D20/D4
D21/D5
D22/D6
D23/D7
D24/D8
D25/D9
D26/D10
D27/D11
D28/D12
D29/D13
D3/port C bit 3
D30/D14
D31/D15
D4/port C bit 4
D5/port C bit 5
D6/port C bit 6
D7/port C bit 7
D8/port C bit 8
D9/port C bit 9
High impedance enable
PLIC ports 1, 2, 3 data
clock/Generated DCL out
Debug data 0
Debug data 1
Debug data 2
Debug data 3
PLIC ports 1, 2, 3 data
input
PLIC ports 1, 2, 3 data
output
DRAM controller reset
enable
Collision
Carrier sense (100
base-T Ethernet only)
Description
BGA
Map
G12
G13
G14
K11
H14
H13
K12
K13
K14
N14
N12
F12
F13
F14
L10
Pin
J11
J12
J13
M1
B7
A7
A8
B8
C3
A2
B2
A1
N2
N1
P6
Signal Descriptions
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I
I
I
I
I
Drive
(mA)
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
4
4
4
4
4
2
Cpf
19-5
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30