MCF5272CVF66J Freescale Semiconductor, MCF5272CVF66J Datasheet - Page 374
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MCF5272CVF66J
Manufacturer Part Number
MCF5272CVF66J
Description
IC MCU 166MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Leaded Process Compatible
No
Rohs Compliant
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5272CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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UART Modules
16.3.11 UART Divider Upper/Lower Registers (UDUn/UDLn)
The UDUn registers (formerly called UBG1n) hold the MSB, and the UDLn registers (formerly UBG2n)
hold the LSB of the preload value. UDUn and UDLn concatenate to provide a divider to CLKIN for
transmitter/receiver operation, as described in
16.3.12 UART Autobaud Registers (UABUn/UABLn)
The UABUn registers hold the MSB, and the UABLn registers hold the LSB of the calculated baud rate.
If UCRn[ENAB] is set, the value in these registers is automatically loaded into UDUn and UDLn.
16-14
Address
Address
Address
Address
Reset
Reset
Reset
Reset
Field
Field
Field
Field
R/W
R/W
R/W
R/W
The minimum value that can be loaded on the concatenation of UDUn with
UDLn is 0x0002. Both UDUn and UDLn are write-only and cannot be read
by the CPU.
7
7
7
7
MCF5272 ColdFire
Figure 16-14. UART Autobaud Upper Registers (UABUn)
Figure 16-15. UART Autobaud Lower Registers (UABLn)
Figure 16-12. UART Divider Upper Registers (UDUn)
Figure 16-13. UART Divider Lower Registers (UDLn)
®
MBAR + 0x120 (UABU0), 0x160 (UABU1)
MBAR + 0x124 (UABL0), 0x164 (UABL1)
Integrated Microprocessor User’s Manual, Rev. 3
MBAR + 0x118 (UDU0), 0x158 (UDU1)
MBAR + 0x11C (UDL0), 0x15C (UDL1)
Section 16.5.1.2.1, “CLKIN Baud
NOTE
Autobaud MSB
Autobaud LSB
Divider MSB
Divider LSB
0000_0000
0000_0000
0000_0000
0000_0000
Write only
Write only
Read only
Read only
Rates.”
Freescale Semiconductor
0
0
0
0
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