MCF5272CVF66J Freescale Semiconductor, MCF5272CVF66J Datasheet - Page 81
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MCF5272CVF66J
Manufacturer Part Number
MCF5272CVF66J
Description
IC MCU 166MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272CVF66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Leaded Process Compatible
No
Rohs Compliant
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5272CVF66J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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2.6
The ColdFire instruction set is a simplified version of the M68000 instruction set. The removed
instructions include BCD, bit field, logical rotate, decrement and branch, and integer multiply with a 64-bit
result. Nine new MAC instructions have been added.
Table 2-6
Freescale Semiconductor
Instruction
MACSR
#<data>
DDATA
MASK
Dy,Dx
Ry,Rx
Ay,Ax
<ea>
CCR
ACC
PST
Rm
Rw
PC
SR
An
Dn
Rc
Rn
cc
Xi
Instruction Set Summary
lists notational conventions used throughout this manual.
Logical condition (example: NE for not equal)
Any address register n (example: A3 is address register 3)
Source and destination address registers, respectively
Any data register n (example: D5 is data register 5)
Source and destination data registers, respectively
Any control register (example VBR is the vector base register)
MAC registers (ACC, MAC, MASK)
Any address or data register
Destination register w (used for MAC instructions only)
Any source and destination registers, respectively
index register i (can be an address or data register: Ai, Di)
MAC accumulator register
Condition code register (lower byte of SR)
MAC status register
MAC mask register
Program counter
Status register
Debug data port
Processor status port
Immediate data following the 16-bit operation word of the instruction
Effective address
MCF5272 ColdFire
Table 2-6. Notational Conventions
®
Integrated Microprocessor User’s Manual, Rev. 3
Miscellaneous Operands
Register Specifications
Opcode Wildcard
Register Names
Port Names
Operand Syntax
ColdFire Core
2-13
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