HD64F3437TFI16V Renesas Electronics America, HD64F3437TFI16V Datasheet - Page 296
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HD64F3437TFI16V
Manufacturer Part Number
HD64F3437TFI16V
Description
MCU FLASH 60K 100-TQFP
Manufacturer
Renesas Electronics America
Datasheet
1.HD64F3437TFI16V.pdf
(755 pages)
Specifications of HD64F3437TFI16V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Transmitting Serial Data: Follow the procedure in figure 12.5 for transmitting serial data.
264
1
2
3
4
If using multiprocessor format,
Write transmit data in TDR
select MPBT value in SSR
Clear TE bit in SCR to 0
Read TDRE bit in SSR
Read TEND bit in SSR
Set DR = 0, DDR = 1
Clear TDRE bit to 0
Serial transmission
Start transmitting
transmission?
Output break
TDRE = 1?
TEND = 1?
Initialize
signal?
End of
End
Figure 12.5 Sample Flowchart for Transmitting Serial Data
Yes
Yes
Yes
Yes
No
No
No
No
1.
2.
3.
4.
(a)
(b)
SCI initialization: the transmit data output function
of the TxD pin is selected automatically.
After the TE bit is set to 1, one frame of 1s is output,
then transmission is possible.
SCI status check and transmit data write: read
the serial status register (SSR), check that the
TDRE bit is 1, then write transmit data in the
transmit data register (TDR) and clear TDRE to 0.
If a multiprocessor format is selected, after
writing the transmit data write 0 or 1 in the
multiprocessor bit transfer (MPBT) in SSR.
Transition of the TDRE bit from 0 to 1 can be
reported by an interrupt.
To continue transmitting serial data: read the
TDRE bit to check whether it is safe to write; if
TDRE = 1, write data in TDR, then clear TDRE
to 0.
To end serial transmission: end of transmission
can be confirmed by checking transition of the
TEND bit from 0 to 1. This can be reported by
a TEI interrupt.
To output a break signal at the end of serial
transmission: set the DDR bit to 1 and clear the
DR bit to 0 (DDR and DR are I/O port registers),
then clear TE to 0 in SCR.
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