HD64F3437TFI16V Renesas Electronics America, HD64F3437TFI16V Datasheet - Page 550

• Manufacturer Part Number: HD64F3437TFI16V
• Description: MCU FLASH 60K 100-TQFP
• Manufacturer: Renesas Electronics America

Specifications of HD64F3437TFI16V

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6. Boot mode can be entered by starting from a reset after pin settings are made according to the
7. If the input level of a mode pin is changed during a reset (e.g., from low to high), the resultant
Notes: *1 Mode pin input must satisfy the mode programming setup time (t
518
At this time, the values of general registers in the CPU are undetermined. Thus these registers
should be initialized immediately after branching to the user program. Especially in the case of
the stack pointer (SP), which is used implicitly in subroutine calls, etc., the stack area used by
the user program should be specified.
There are no other changes to the initialized values of other registers.
mode setting conditions listed in table 21.6.
In the H8/3437SF, P9
when reset is released
Boot mode can be released by driving the reset pin low, waiting at least 20 system clock
cycles, then setting the mode pins and releasing the reset
Boot mode can also be released if a watchdog timer overflow reset occurs.
The mode pin input levels must not be changed during boot mode.
switch in the microcontroller’s operating mode will affect the bus control output signals (AS,
RD, and WR) and the status of ports that can be used for address output
Therefore, either set these pins so that they do not output signals during the reset, or make sure
that their output signals do not collide with other signals output the microcontroller.
*2 These ports output low-level address signals if the mode pins are set to mode 1 during
respect to the reset release timing.
the reset. In all other modes, these ports are in the high-impedance state. The bus
control output signals are high if the mode pins are set for mode 1 or 2 during the reset.
In mode 3, they are at high impedance.
MD
2
*1
0,
, P9
Figure 21.10 Programming Mode Timing
.
RES
MD
P9
P9
P9
1
, and P9
2
1
0
1
0
can be used as I/O ports if boot mode selection is detected
tMDS
tMDS: 4t
*1
.
CYC
(min.)
*2
MDS
.
= 4 states) with