HD64F3437TFI16V Renesas Electronics America, HD64F3437TFI16V Datasheet - Page 506

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HD64F3437TFI16V

Manufacturer Part Number
HD64F3437TFI16V
Description
MCU FLASH 60K 100-TQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64F3437TFI16V

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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20.4.7
Prewrite-verify mode is a verify mode used when programming all bits to equalize their threshold
voltages before erasing them.
To program all bits, follow the prewrite algorithm shown in figure 20.10. The procedure is to
program all flash memory data to H'00 by using H'00 write data. H'00 should also be written when
using RAM for flash memory emulation (when prewriting a RAM area). (This also applies when
using RAM to emulate flash memory erasing with an emulator or other support tool.) After the
necessary programming time has elapsed, exit program mode (by clearing the P bit to 0) and select
prewrite-verify mode (leave the P, E, PV, and EV bits all cleared to 0). In prewrite-verify mode, a
prewrite-verify voltage is applied to the memory cells at the read address. If the flash memory is
read in this state, the data at the read address will be read. After selecting prewrite-verify mode,
wait 4 s or more before reading.
Note: For a sample prewriting program, see the prewrite subroutine in the sample erasing
20.4.8
Flash memory can be protected from programming and erasing by software or hardware methods.
These two protection modes are described below.
Software Protection: Prevents transitions to program mode and erase mode even if the P or E bit
is set in the flash memory control register (FLMCR). Details are as follows.
Protection
Block
protect
Emulation
protect
Notes: *1 Three modes: program-verify, erase-verify, and prewrite-verify.
474
*2
program.
*2 Except in RAM areas overlapped onto flash memory.
*3 All blocks are erase-disabled. It is not possible to specify individual blocks.
Prewrite Verify Mode
Protect Modes
Description
Individual blocks can be protected from erasing
and programming by the erase block registers
(EBR1 and EBR2). If H'00 is set in EBR1 and
EBR2, all blocks are protected from erasing and
programming.
When the RAMS or RAM0 bit, but not both,
is set in the wait-state control register (WSCR),
all blocks are protected from programming and
erasing
Program
Disabled
Disabled
Function
Erase
Disabled
Disabled
*3
Verify
Enabled
Enabled
*1

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