HD64F3437TFI16V Renesas Electronics America, HD64F3437TFI16V Datasheet - Page 324

• Manufacturer Part Number: HD64F3437TFI16V
• Description: MCU FLASH 60K 100-TQFP
• Manufacturer: Renesas Electronics America

Specifications of HD64F3437TFI16V

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.2.5
Note: * Only 0 can be written, to clear the flag.
ICSR is an 8-bit readable/writable register with flags that indicate the status of the I
interface. It is also used for issuing start and stop conditions, and recognizing and controlling
acknowledge data.
ICSR is initialized to H'30 by a reset and in hardware standby mode.
Bit 7—Bus Busy (BBSY): This bit can be read to check whether the I
busy or free. In master mode this bit is also used in issuing start and stop conditions.
A high-to-low transition of SDA while SCL is high is recognized as a start condition, setting
BBSY to 1. A low-to-high transition of SDA while SCL is high is recognized as a stop condition,
clearing BBSY to 0.
To issue a start condition, use a MOV instruction to write 1 in BBSY and 0 in SCP. A retransmit
start condition is issued in the same way. To issue a stop condition, use a MOV instruction to
write 0 in BBSY and 0 in SCP. It is not possible to write to BBSY in slave mode.
Bit 7: BBSY
0
1
292
Bit
Initial value
Read/Write
I
2
C Bus Status Register (ICSR)
BBSY
R/W
Description
Bus is free
This bit is cleared when a stop condition is detected.
Bus is busy
This bit is set when a start condition is detected.
7
0
R/(W)*
IRIC
6
0
SCP
W
5
1
—
—
4
1
R/(W)*
AL
3
0
R/(W)*
2
C bus (SCL and SDA) is
AAS
2
0
R/(W)*
ADZ
1
0
2
C bus
(Initial value)
ACKB
R/W
0
0