HD64F3437TFI16V Renesas Electronics America, HD64F3437TFI16V Datasheet - Page 381

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HD64F3437TFI16V

Manufacturer Part Number
HD64F3437TFI16V
Description
MCU FLASH 60K 100-TQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64F3437TFI16V

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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HD64F3437TFI16V
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Table 15.4 A/D Conversion Time (Single Mode)
Synchronization delay
Input sampling time*
A/D conversion time*
Note: Values in the table are numbers of states.
15.4.4
A/D conversion can be externally triggered. When the TRGE bit is set to 1 in ADCR, external
trigger input is enabled at the ADTRG pin. A high-to-low transition at the ADTRG pin sets the
ADST bit to 1 in ADCSR, starting A/D conversion. Other operations, in both single and scan
modes, are the same as if the ADST bit had been set to 1 by software. Figure 15.6 shows the
timing.
ø
ADTRG
Internal trigger
signal
ADST
* Values for when ø
External Trigger Input Timing
Figure 15.6 External Trigger Input Timing
P
Symbol
t
t
t
D
SPL
CONV
= ø. When ø
Min
10
259
P
= ø/2, values are double those given in the table.
CKS = 0
Typ
80
Max
17
266
A/D conversion
Min
6
131
CKS = 1
Typ
40
Max
9
134
349

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