S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 22

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Device Overview S12XS Family
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— Time-out interrupt and peripheral triggers
— Start of timers can be aligned
Up to 8 channel x 8-bit or 4 channel x 16-bit Pulse Width Modulator
— Programmable period and duty cycle per channel
— Center- or left-aligned outputs
— Programmable clock select logic with a wide range of frequencies
Serial Peripheral Interface Module (SPI)
— Configurable for 8 or 16-bit data size
— Full-duplex or single-wire bidirectional
— Double-buffered transmit and receive
— Master or Slave mode
— MSB-first or LSB-first shifting
— Serial clock phase and polarity options
Two Serial Communication Interfaces (SCI)
— Full-duplex or single wire operation
— Standard mark/space non-return-to-zero (NRZ) format
— Selectable IrDA 1.4 return-to-zero-inverted (RZI) format with programmable pulse widths
— 13-bit baud rate selection
— Programmable character length
— Programmable polarity for transmitter and receiver
— Receive wakeup on active edge
— Break detect and transmit collision detect supporting LIN
On-Chip Voltage Regulator
— Two parallel, linear voltage regulators with bandgap reference
— Low-voltage detect (LVD) with low-voltage interrupt (LVI)
— Power-on reset (POR) circuit
— Low-voltage reset (LVR)
Low-power wake-up timer (API)
— Internal oscillator driving a down counter
— Trimmable to +/-10% accuracy
— Time-out periods range from 0.2ms to ~13s with a 0.2ms resolution
Input/Output
— Up to 91 general-purpose input/output (I/O) pins depending on the package option and 2 input-
— Hysteresis and configurable pull up/pull down device on all input pins
— Configurable drive strength on all output pins
Package Options
— 112-pin low-profile quad flat-pack (LQFP)
— 80-pin quad flat-pack (QFP)
only pins
S12XS Family Reference Manual, Rev. 1.11
Freescale Semiconductor