S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 263

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

S12XECRG performs a quality check on the incoming clock signal. As soon as clock quality check indicates
a valid Oscillator Clock signal the reset sequence starts using the Oscillator clock. If after 50 check windows
the clock quality check indicated a non-valid Oscillator Clock the reset sequence starts using Self-Clock
Mode.
Figure 8-22
when the RESET pin is held low.
8.6
The interrupts/reset vectors requested by the S12XECRG are listed in
specification for related vector addresses and priorities.
Freescale Semiconductor
Interrupts
and
Figure 8-23
Internal RESET
RESET
Internal POR
RESET
Internal POR
Internal RESET
Figure 8-22. RESET Pin Tied to V
Interrupt Source
Real time interrupt
show the power-up sequence for cases when the RESET pin is tied to V
LOCK interrupt
SCM interrupt
Figure 8-23. RESET Pin Held Low Externally
Table 8-18. S12XECRG Interrupt Vectors
S12XS Family Reference Manual Rev. 1.11
Mask
Clock Quality Check
(no Self-Clock Mode)
Clock Quality Check
(no Self Clock Mode)
CCR
I bit
I bit
I bit
128 SYSCLK
) (
) (
) (
128 SYSCLK
) (
) (
) (
64 SYSCLK
DD
64 SYSCLK
(by a Pull-up Resistor)
CRGINT (LOCKIE)
CRGINT (SCMIE)
CRGINT (RTIE)
Local Enable
S12XE Clocks and Reset Generator (S12XECRGV1)
Table
8-18. Refer to MCU
DD
and
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