S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 229

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S9S12XS256J0CAL

Manufacturer Part Number
S9S12XS256J0CAL
Description
MCU 256K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12XS256J0CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
8K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XS
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
91
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12XSFAME, EVB9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 7
Security (S12XS9SECV2)
7.1
This specification describes the function of the security mechanism in the S12XS chip family (9SEC).
7.1.1
The user must be reminded that part of the security must lie with the application code. An extreme example
would be application code that dumps the contents of the internal memory. This would defeat the purpose
of security. At the same time, the user may also wish to put a backdoor in the application program. An
example of this is the user downloads a security key through the SCI, which allows access to a
programming routine that updates parameters stored in another section of the Flash memory.
The security features of the S12XS chip family (in secure mode) are:
Table 7-2
Freescale Semiconductor
Number
Version
02.00
02.01
02.02
Protect the content of non-volatile memories (Flash, EEPROM)
Execution of NVM commands is restricted
Disable access to internal memory via background debug module (BDM)
Flash Array Access
Introduction
gives an overview over availability of security relevant features in unsecure and secure modes.
Revision
27 Aug
21 Feb
19 Apr
2004
2007
2007
Date
Features
No security feature is absolutely secure. However, Freescale’s strategy is to
make reading or copying the FLASH and/or EEPROM difficult for
unauthorized users.
Table 7-2. Feature Availability in Unsecure and Secure Modes on S12XS
Effective
08 Sep
21 Feb
19 Apr
2004
2007
2007
Date
NS
S12XS Family Reference Manual, Rev. 1.11
Author
SS
Table 7-1. Revision History
Unsecure Mode
NX
ES
NOTE
reviewed and updated for S12XD architecture
added S12XE, S12XF and S12XS architectures
corrected statement about Backdoor key access via BDM on XE, XF,
XS
EX
ST
NS
Description of Changes
SS
Secure Mode
NX
ES
EX
ST
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