S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 367

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.2.1
This pin serves as waveform output of PWM channel 7 and as an input for the emergency shutdown
feature.
13.2.2
This pin serves as waveform output of PWM channel 6.
13.2.3
This pin serves as waveform output of PWM channel 5.
13.2.4
This pin serves as waveform output of PWM channel 4.
13.2.5
This pin serves as waveform output of PWM channel 3.
13.2.6
This pin serves as waveform output of PWM channel 2.
13.2.7
This pin serves as waveform output of PWM channel 1.
13.2.8
This pin serves as waveform output of PWM channel 0.
13.3
This section describes in detail all the registers and register bits in the PWM module.
The special-purpose registers and register bit functions that are not normally available to device end users,
such as factory test control registers and reserved registers, are clearly identified by means of shading the
appropriate portions of address maps and register diagrams. Notes explaining the reasons for restricting
access to the registers and functions are also explained in the individual register descriptions.
13.3.1
This section describes the content of the registers in the PWM module. The base address of the PWM
module is determined at the MCU level when the MCU is defined. The register decode map is fixed and
begins at the first address of the module address offset. The figure below shows the registers associated
Freescale Semiconductor
Memory Map and Register Definition
PWM7 — PWM Channel 7
PWM6 — PWM Channel 6
PWM5 — PWM Channel 5
PWM4 — PWM Channel 4
PWM3 — PWM Channel 3
PWM3 — PWM Channel 2
PWM3 — PWM Channel 1
PWM3 — PWM Channel 0
Module Memory Map
S12XS Family Reference Manual, Rev. 1.11
Pulse-Width Modulator (S12PWM8B8CV1)
367