S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 669

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S9S12XS256J0CAL

Manufacturer Part Number
S9S12XS256J0CAL
Description
MCU 256K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12XS256J0CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
8K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XS
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
91
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12XSFAME, EVB9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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1
2
3
A.1.10
This section describes the current consumption characteristics of the device as well as the conditions for
the measurements.
A.1.10.1
Since the current consumption of the output drivers is load dependent, all measurements are without output
loads and with minimum I/O activity. The currents are measured in single chip mode, S12XCPU code is
executed from Flash. V
using a 4MHz oscillator in loop controlled Pierce mode.
Since the DBG and BDM modules are typically not used in the end application, the supply current values
for these modules is not specified.
An overhead of current consumption exists independent of the listed modules, due to voltage regulation
and clock logic that is not dedicated to a specific module. This is listed in the table row named “overhead”.
Table A-9
A.1.10.2
Currents are measured in single chip mode, S12XCPU with V
enabled and a 40MHz bus frequency from a 4MHz input. Characterized parameters are derived using a
Freescale Semiconductor
Conditions are 4.5 V < V
I/O Characteristics for all I/O pins except EXTAL, XTAL,TEST and supply pins.
16
17
18
Maximum leakage current occurs at maximum operating temperature.
Refer to
Parameter only applies in stop or pseudo stop mode.
Peripheral
D Port H, J, P interrupt input pulse passed (STOP)
D IRQ pulse width, edge-sensitive mode (STOP)
D XIRQ pulse width with X-bit set (STOP)
Table A-9. Module Configurations for Typical Run Supply (VDDR+VDDA) Current
S12XCPU
Overhead
MSCAN
PWM
Section A.1.4, “Current Injection”
ATD
SPI
SCI
TIM
shows the configuration of the peripherals for typical run current.
Supply Currents
Typical Run Current Measurement Conditions
Maximum Run Current Measurement Conditions
DD35
420 cycle loop: 384 DBNE cycles plus subroutine entry to stimulate stacking (RAM access)
Configured to loop-back mode using a bit rate of 500kbit/s
Configured to master mode, continuously transmit data (0x55 or 0xAA) at 2Mbit/s
Configured into loop mode, continuously transmit data (0x55) at speed of 19200 baud
Configured to toggle its pins at the rate of 1kHz
The peripheral shall be configured in output compare mode. Pulse accumulator and modulus
counter enabled.
The peripheral is configured to operate at its maximum specified
frequency and to continuously convert voltages on all input channels in sequence.
VREG supplying 1.8V from a 5V input voltage, PLL on
DD35
< 5.5 V junction temperature from –40°C to +150°C, unless otherwise noted
=5V, internal voltage regulator is enabled and the bus frequency is 40MHz
S12XS Family Reference Manual, Rev. 1.11
Table A-8. 5-V I/O Characteristics
for more details
PW
Configuration
PW
t
PULSE
XIRQ
IRQ
DD35
=5.5V, internal voltage regulator
4
1
4
Electrical Characteristics
V
DD35
=5V
tcyc
tcyc
tosc
669

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