S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 658

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical Characteristics
The VDDX, VSSX pin pairs [2:1] supply the I/O pins.
VDDR supplies the internal voltage regulator.
VDDPLL, VSSPLL pin pair supply the oscillator and the PLL.
VSS1, VSS2 and VSS3 are internally connected by metal.
All VDDX pins are internally connected by metal.
All VSSX pins are internally connected by metal.
VDDA is connected to all VDDX pins by diodes for ESD protection such that VDDX must not exceed
VDDA by more than a diode voltage drop. VDDA can exceed VDDX by more than a diode drop in order
to support applications with a 5V A/D converter range and 3.3V I/O pin range.
VSSA and VSSX are connected by anti-parallel diodes for ESD protection.
A.1.3
There are four groups of functional pins.
A.1.3.1
The I/O pins have a level in the range of 3.13V to 5.5V. This class of pins is comprised of all port I/O pins,
the analog inputs, BKGD and the RESET pins. Some functionality may be disabled. For example the
BKGD pin pull up is always enabled.
A.1.3.2
This group is made up by the V
A.1.3.3
The pins EXTAL, XTAL dedicated to the oscillator have a nominal 1.8V level. They are supplied by
VDDPLL.
658
Pins
I/O Pins
Analog Reference
Oscillator
In the following context V
VDDX; V
I
pins. The Run mode current in the VDDX domain is external load
dependent.
V
V
I
VDDPLL.
DD35
DD
DD
DDPLL
is used for the sum of the currents flowing into VDD, VDDF and
is used for VDD, V
denotes the sum of the currents flowing into the VDDA and VDDR
is used for VDDPLL, V
SS35
is used for either VSSA and VSSX unless otherwise noted.
RH
S12XS Family Reference Manual, Rev. 1.11
and V
SS
RL
DD35
is used for VSS1, VSS2 and VSS3.
pins.
is used for either VDDA, VDDR, and
SSPLL
NOTE
is used for VSSPLL
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