S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 674

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S9S12XS256J0CAL

Manufacturer Part Number
S9S12XS256J0CAL
Description
MCU 256K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12XS256J0CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
8K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XS
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
91
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12XSFAME, EVB9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Electrical Characteristics
is recommended to configure PortAD pins as outputs only for low frequency, low load outputs. The impact
on ATD accuracy is load dependent and not specified. The values specified are valid under condition that
no PortAD output drivers switch during conversion.
A.2.2.2
Due to the input pin leakage current as specified in
resistance there will be a voltage drop from the signal source to the ATD input. The maximum source
resistance R
leakage current. If device or operating conditions are less than worst case or leakage-induced error is
acceptable, larger values of source resistance of up to 10Kohm are allowed.
A.2.2.3
When sampling an additional internal capacitor is switched to the input. This can cause a voltage drop due
to charge sharing with the external and the pin capacitance. For a maximum sampling error of the input
voltage ≤ 1LSB (10-bit resilution), then the external filter capacitor, C
A.2.2.4
There are two cases to consider.
674
1. A current is injected into the channel being converted. The channel being stressed has conversion
2. Current is injected into pins in the neighborhood of the channel being converted. A portion of this
values of $3FF (in 10-bit mode) for analog inputs greater than V
V
current is picked up by the channel (coupling ratio K), This additional current impacts the accuracy
of the conversion depending on the source resistance.
The additional input voltage error on the converted channel can be calculated as:
with I
RL
S
unless the current is higher than specified as disruptive condition.
INJ
Source Resistance
Source Capacitance
Current Injection
specifies results in an error (10-bit resolution) of less than 1/2 LSB (2.5 mV) at the maximum
V
being the sum of the currents injected into the two pins adjacent to the converted channel.
ERR
= K * R
S
* I
S12XS Family Reference Manual, Rev. 1.11
INJ
Table A-7
and
Table A-8
f
≥ 1024 * (C
RH
in conjunction with the source
and $000 for values less than
INS
Freescale Semiconductor
–C
INN
).

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