S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 86

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
Port Integration Module (S12XSPIMV1)
2.3.19
86
Address 0x0241
Read: Anytime.
Write:Never, writes to this register have no effect.
Field
Field
PTIT
Reset
PTT
PTT
3-0
7-0
5
W
R
Port T general purpose input/output data—Data Register, TIM output, routed PWM output, VREG_API output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port T general purpose input/output data—Data Register, TIM output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port T input data—
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
• The TIM output function takes precedence over the routed PWM, VREG_API function and the general purpose
• The routed PWM function takes precedence over VREG_API and the general purpose I/O function if the related
• The VREG_API takes precedence over the general purpose I/O function if enabled.
• The TIM output function takes precedence over the general purpose I/O function if the related channel is enabled.
PTIT7
Port T Input Register (PTIT)
I/O function if the related channel is enabled.
channel is enabled.
u
7
= Unimplemented or Reserved
PTIT6
Table 2-16. PTT Register Field Descriptions (continued)
u
6
Table 2-17. PTIT Register Field Descriptions
Figure 2-17. Port T Input Register (PTIT)
S12XS Family Reference Manual, Rev. 1.11
PTIT5
u
5
PTIT4
u
4
Description
Description
u = Unaffected by reset
PTIT3
3
u
PTIT2
u
2
Freescale Semiconductor
PTIT1
u
1
Access: User read
PTIT0
u
0
1