DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 208

• Manufacturer Part Number: DF61657CN35FTV
• Description: IC H8SX/1657 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61657CN35FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 35MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: 3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 6 Bus Controller (BSC)
6.6.4
This LSI can extend the bus cycle by inserting wait cycles (Tw) when the external address space is
accessed. There are two ways of inserting wait cycles: program wait (Tpw) insertion and pin wait
(Ttw) insertion using the WAIT pin.
(1)
From 0 to 7 wait cycles can be inserted automatically between the T
access space, according to the settings in WTCRA and WTCRB.
(2)
For 3-state access space, when the WAITE bit in BCR1 is set to 1 and the corresponding ICR bit
is set to 1, wait input by means of the WAIT pin is enabled. When the external address space is
accessed in this state, a program wait (Tw) is first inserted according to the WTCRA and WTCRB
settings. If the WAIT pin is low at the falling edge of Bφ in the last T2 or Tpw cycle, another Ttw
cycle is inserted until the WAIT pin is brought high. The pin wait insertion is effective when the
Tw cycles are inserted to seven cycles or more, or when the number of Tw cycles to be inserted is
changed according to the external devices. The WAITE bit is common to all areas. For details on
ICR, see section 9, I/O Ports.
Figure 6.20 shows an example of wait cycle insertion timing. After a reset, the 3-state access is
specified, the program wait is inserted for seven cycles, and the WAIT input is disabled.
Rev. 2.00 Jun. 28, 2007 Page 182 of 864
REJ09B0341-0200
Program Wait Insertion
Pin Wait Insertion
Wait Control
2
state and T
3
state for 3-state