DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 743

• Manufacturer Part Number: DF61657CN35FTV
• Description: IC H8SX/1657 MCU FLASH 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of DF61657CN35FTV

• Core Processor: H8SX
• Core Size: 32-Bit
• Speed: 35MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 82
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• For Use With: 3DK1657 - DEV EVAL KIT FOR H8SX/1657
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3)
The boot program returns information from the flash memory in response to the host's inquiry
commands and sets the device code, clock mode, and bit rate in response to the host's selection
command.
Table 18.15 lists the inquiry and selection commands.
Table 18.15 Inquiry and Selection Commands
Command
H'20
H'10
H'21
H'11
H'22
H'23
H'24
H'25
H'26
H'27
H'3F
H'40
H'4F
Inquiry and Selection States
Command Name
Supported device inquiry
Device selection
Clock mode inquiry
Clock mode selection
Multiplication ratio inquiry
Operating clock frequency inquiry
User boot MAT information inquiry
User MAT information inquiry
Block for erasing information Inquiry Inquiry regarding the number of blocks and
Programming unit inquiry
New bit rate selection
Transition to programming/erasing
state
Boot program status inquiry
Section 18 Flash Memory (0.18-µm F-ZTAT Version)
Inquiry regarding device codes
Selection of device code
Inquiry regarding numbers of clock modes
and values of each mode
Indication of the selected clock mode
Inquiry regarding the number of frequency-
multiplied clock types, the number of
multiplication ratios, and the values of each
multiple
Inquiry regarding the maximum and minimum
values of the main clock and peripheral clocks
Inquiry regarding the number of user boot
MATs and the start and last addresses of
each MAT
Inquiry regarding the a number of user MATs
and the start and last addresses of each MAT
the start and last addresses of each block
Inquiry regarding the unit of program data
Selection of new bit rate
Erasing of user MAT and user boot MAT, and
entry to programming/erasing state
Inquiry into the operated status of the boot
program
Description
Rev. 2.00 Jun. 28, 2007 Page 717 of 864
REJ09B0341-0200