DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 479

IC H8SX/1657 MCU FLASH 120TQFP

DF61657CN35FTV

Manufacturer Part Number
DF61657CN35FTV
Description
IC H8SX/1657 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61657CN35FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
35MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF61657CN35FTV
Manufacturer:
RENESAS
Quantity:
101
Part Number:
DF61657CN35FTV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
10.4.3
Buffer operation, provided for channels 0 and 3, enables TGRC and TGRD to be used as buffer
registers.
Buffer operation differs depending on whether TGR has been designated as an input capture
register or a compare match register.
Table 10.29 shows the register combinations used in buffer operation.
Table 10.29 Register Combinations in Buffer Operation
• When TGR is an output compare register
Channel
0
3
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register.
This operation is illustrated in figure 10.12.
Buffer Operation
Buffer register
Figure 10.12 Compare Match Buffer Operation
Timer General Register
TGRA_0
TGRB_0
TGRA_3
TGRB_3
Compare match signal
Timer general
register
Comparator
Section 10 16-Bit Timer Pulse Unit (TPU)
Buffer Register
TGRC_0
TGRD_0
TGRC_3
TGRD_3
Rev. 2.00 Jun. 28, 2007 Page 453 of 864
TCNT
REJ09B0341-0200

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