DF61657CN35FTV Renesas Electronics America, DF61657CN35FTV Datasheet - Page 698

IC H8SX/1657 MCU FLASH 120TQFP

DF61657CN35FTV

Manufacturer Part Number
DF61657CN35FTV
Description
IC H8SX/1657 MCU FLASH 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of DF61657CN35FTV

Core Processor
H8SX
Core Size
32-Bit
Speed
35MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
82
Program Memory Size
768KB (768K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
3DK1657 - DEV EVAL KIT FOR H8SX/1657
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Section 18 Flash Memory (0.18-µm F-ZTAT Version)
(b) Programming
FPFR indicates the return value of the programming result.
Rev. 2.00 Jun. 28, 2007 Page 672 of 864
REJ09B0341-0200
Bit
7
6
5
Bit
Bit Name
Bit Name
MD
EE
7
Initial
Value
MD
6
R/W
R/W
R/W
EE
5
Description
Unused
Returns 0.
Programming Mode Related Setting Error Detect
Detects the error protection state and returns the result.
When the error protection state is entered, this bit is set
to 1. Whether the error protection state is entered or not
can be confirmed with the FLER bit in FCCS. For
conditions to enter the error protection state, see section
18.9.3, Error Protection.
0: Normal operation (FLER = 0)
1: Error protection state, and programming cannot be
Programming Execution Error Detect
Writes 1 to this bit when the specified data could not be
written because the user MAT was not erased. If this bit
is set to 1, there is a high possibility that the user MAT
has been written to partially. In this case, after removing
the error factor, erase the user MAT. If FMATS is set to
H'AA and the user boot MAT is selected, an error occurs
when programming is performed. In this case, both the
user MAT and user boot MAT have not been written to.
Programming the user boot MAT should be performed in
boot mode or programmer mode.
0: Programming has ended normally
1: Programming has ended abnormally (programming
performed (FLER = 1)
result is not guaranteed)
FK
4
3
WD
2
WA
1
SF
0

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