HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 201
HD6417705F133BV
Manufacturer Part Number
HD6417705F133BV
Description
MPU 3V 0K PB-FREE 208 FP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417705F133BV.pdf
(741 pages)
Specifications of HD6417705F133BV
Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
105
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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Notes: 1. Memory that has an interface such as SRAM or ROM.
Area
Area 1
Area 2
Area 3
Area 4
Area 5A
Area 5B
Area 6A
Area 6B
Area 7 *
6
2. Memory bus width is specified by an external pin.
3. Memory bus width is specified by a register.
4. With the address/data multiplex I/O (MPX) interface, the bus width must be 16 bits.
5. With the SDRAM, the bus width must be 16 bits or 32 bits.
6. Do not access the reserved area. If the reserved area is accessed, the operation cannot
7. When the addresses of the on-chip module control registers (internal I/O registers) in
Memory to be
Connected
Internal I/O register *
Normal memory *
Synchronous DRAM
Normal memory *
Synchronous DRAM
Normal memory *
Burst ROM,
Byte-selection SRAM
Normal memory *
Normal memory *
Address/data multiplex
I/O (MPX), Byte-
selection SRAM
Normal memory *
Normal memory *
Reserved area
be guaranteed.
area 1 are not translated by the MMU, set the top three bits of the logical addresses to
101 to allocate in the P2 space.
1
1
1
1
1
1
1
,
,
,
,
7
Physical Address
H'04000000
H'04000000
H'08000000
H'08000000
H'0C000000
H'0C000000
H'10000000
H'10000000
H'14000000
H'14000000
H'16000000
H'16000000
H'18000000
H'18000000
H'1A000000
H'1A000000
H'1C000000
H'20000000 n
H'20000000 n
H'20000000 n
H'20000000 n
H'20000000 n
H'20000000 n
H'20000000 n
H'20000000 n
H'20000000 n
to H'07FFFFFF
to H'07FFFFFF
to H'0BFFFFFF
to H'0BFFFFFF
to H'13FFFFFF
to H'13FFFFFF
to H'15FFFFFF
to H'15FFFFFF
to H'17FFFFFF
to H'17FFFFFF
to H'19FFFFFF
to H'19FFFFFF
to H'1BFFFFFF 32 Mbytes 8, 16 *
to H'1BFFFFFF
to H'0FFFFFFF 64 Mbytes 8, 16, 32 *
to H'0FFFFFFF
to H'1FFFFFFF
H'20000000 n
H'20000000 n
H'20000000 n
H'20000000 n
H'20000000 n
H'20000000 n
H'20000000 n
H'20000000 n
H'20000000 n
Rev. 2.00, 09/03, page 153 of 690
Capacity
64 Mbytes 8, 16, 32 *
Shadow
Shadow
64 Mbytes 8, 16, 32 *
Shadow
32 Mbytes 8, 16, 32 *
Shadow
32 Mbytes 8, 16 *
Shadow
32 Mbytes 8, 16 *
Shadow
Shadow
Access
Size
(n:1 to 6)
(n:1 to 6)
(n: 1 to 6)
(n: 1 to 6)
(n: 1 to 6)
(n: 1 to 6)
(n: 1 to 6)
(n: 1 to 6)
(n: 0 to 7)
3,
3
3
*
4
3,
3,
3
3
*
*
5
5
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