HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 628

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

23.4.4
An UDI reset is executed by setting an UDI reset assert command in SDIR. An UDI reset is of the
same kind as a power-on reset. An UDI reset is released by inputting an UDI reset negate
command. The required time between the UDI reset assert command and UDI reset negate
command is the same as time for keeping the
23.4.5
The UDI interrupt function generates an interrupt by setting a command from the UDI in the
SDIR. An UDI interrupt is a general exception/interrupt operation, resulting in a branch to an
address based on the VBR value plus offset, and with return by the RTE instruction. This interrupt
request has a fixed priority level of 15.
UDI interrupts are accepted in sleep mode, but not in standby mode.
Rev. 2.00, 09/03, page 580 of 690
Chip internal reset
TCK
TDO
(when the UDI
command is set)
TDO
(when the boundary scan
command is set)
CPU state
UDI Reset
UDI Interrupt
SDIR
UDI reset assert
Figure 23.3 UDI Data Transfer Timing
Figure 23.4 UDI Reset
t
R E S E T P
TDO
UDI reset negate
pin low to apply a power-on reset.
t
TDO
Branch to H'A0000000