HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 465

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

When the clock source, etc., is changed, the TE and RE bits must be cleared to 0 before making
the change using the following procedure. When the TE bit is cleared to 0, the transmit shift
register (SCTSR) is initialized. Note that clearing the TE and RE bits to 0 does not change the
contents of SCSSR, SCFTDR, or SCFRDR. The TE bit should be cleared to 0 after all transmit
data has been sent and the TEND bit in SCSSR has been set to 1. The TE bit should not be cleared
to 0 during transmission; if attempted, the TxD pin will go to the high-impedance state. Before
setting TE to 1 again to start transmission, the TFRST bit in SCFCR should first be set to 1 to reset
SCFTDR.
Rev. 2.00, 09/03, page 417 of 690