HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 504

MPU 3V 0K PB-FREE 208 FP

HD6417705F133BV

Manufacturer Part Number
HD6417705F133BV
Description
MPU 3V 0K PB-FREE 208 FP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417705F133BV

Core Processor
SH-3
Core Size
32-Bit
Speed
133MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
105
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
1. Setup Stage
Rev. 2.00, 09/03, page 456 of 690
Notes: 1. In the setup stage, the application analyzes command data from the host requiring processing by
Receive 8-byte command
SETUP token reception
reception complete flag
2. When the transfer direction is control-out, the EP0i transfer request interrupt required in the status
(IFR0.SETUP TS = 1)
Set setup command
to be processed by
the application, and determines the subsequent processing (for example, data stage direction, etc.).
stage should be enabled here. When the transfer direction is control-in, this interrupt is not required
and should be disabled.
To data stage
data in EP0s
application?
Command
USB function
Yes
Figure 18.5 Setup Stage Operation
No
processing by
Interrupt request
this module
Automatic
Clear EP0o FIFO (CLR.EP0oCLR = 1)
Clear EP0i FIFO (CLR.EP0iCLR = 1)
To control-in
Write 1 to EP0s read complete bit
Determine data stage direction *
data stage
Read 8-byte data from EP0s
Decode command data
(TRG.EP0s RDFN = 1)
(IFR0.SETUP TS = 0)
Clear SETUP TS flag
Application
*
2
To control-out
data stage
1

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