HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 424

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

There are six interrupt sources transmit-data-stop, transmit-FIFO-data-empty, receive-FIFO-
data-full, receive-error (framing/parity error), break-receive, and receive-data-ready interrupts.
Two interrupt sources in clock synchronous mode
There are two interrupt sources transmit-FIFO-data-empty and receive-FIFO-data-full
interrupts.
The DMA controller (DMAC) can be activated to execute a data transfer in the event of a
transmit-FIFO-data-empty, transmit-data-stop, or receive-FIFO-data-full interrupt. The DMAC
requests of transmit-FIFO-data-empty and transmit-data-stop interrupts are the same.
On-chip modem control functions (
and
)
C T S
R T S
On-chip transmit-data-stop functions (only in asynchronous mode)
When not in use, the SCIF can be stopped by halting its clock supply to reduce power
consumption.
The amount of data in the transmit/receive FIFO registers and the number of receive errors in
the receive data in the receive FIFO register can be ascertained.
Rev. 2.00, 09/03, page 376 of 690