HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 221

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

CS3WCR
Bit
31 to 15
14
13
12
11
10
9
8
7
Bit
Name
TRP1
TRP0
TRCD1
TRCD0
A3CL1
A3CL0
Initial
Value
0
0
0
0
0
1
0
1
0
R/W
R
R/W
R/W
R
R/W
R/W
R
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Number of Cycles from Auto-precharge/PRE Command to
ACTV Command
Specify the number of minimum cycles from the start of auto-
precharge or issuing of PRE command to the issuing of ACTV
command for the same bank. The setting for areas 2 and 3 is
common.
00: 1 cycle
01: 2 cycles
10: 3 cycles
11: 4 cycles
Reserved
This bit is always read as 0. The write value should always be
0.
Number of Cycles from ACTV Command to
READ(A)/WRIT(A) Command
Specify the number of minimum cycles from issuing ACTV
command to issuing READ(A)/WRIT(A) command. The
setting for areas 2 and 3 is common.
00: 1 cycle
01: 2 cycles
10: 3 cycles
11: 4 cycles
Reserved
This bit is always read as 0. The write value should always be
0.
CAS Latency for Area 3
Specify the CAS latency for area 3.
00: Setting prohibited.
01: 2 cycles
10: 3 cycles
11: Setting prohibited
Rev. 2.00, 09/03, page 173 of 690